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W25Q32FWTBIQ View Datasheet(PDF) - Winbond

Part NameW25Q32FWTBIQ Winbond
Winbond Winbond
Description1.8V 32M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
W25Q32FWTBIQ Datasheet PDF : 94 Pages
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W25Q32FW
8.2.6 Read Data (03h)
The Read Data instruction allows one or more data bytes to be sequentially read from the memory. The
instruction is initiated by driving the /CS pin low and then shifting the instruction code “03h” followed by a
24-bit address (A23-A0) into the DI pin. The code and address bits are latched on the rising edge of the
CLK pin. After the address is received, the data byte of the addressed memory location will be shifted out
on the DO pin at the falling edge of CLK with most significant bit (MSB) first. The address is automatically
incremented to the next higher address after each byte of data is shifted out allowing for a continuous
stream of data. This means that the entire memory can be accessed with a single instruction as long as the
clock continues. The instruction is completed by driving /CS high.
The Read Data instruction sequence is shown in Figure 14. If a Read Data instruction is issued while an
Erase, Program or Write cycle is in process (BUSY=1) the instruction is ignored and will not have any
effects on the current cycle. The Read Data instruction allows clock rates from D.C. to a maximum of fR
(see AC Electrical Characteristics).
The Read Data (03h) instruction is only supported in Standard SPI mode.
/CS
CLK
DI
(IO0)
DO
(IO1)
Mode 3
0
Mode 0
* = MSB
1 2 3 4 5 6 7 8 9 10
28 29 30 31 32 33 34 35 36 37 38 39
Instruction (03h)
24-Bit Address
23 22 21
*
High Impedance
3210
Data Out 1
765432107
*
Figure 14. Read Data Instruction (SPI Mode only)
- 32 -
Publication Release Date: July 01, 2016
- Revision H
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GENERAL DESCRIPTIONS
The W25Q32FW (32M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 1.65V to 1.95V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving packages.
The W25Q32FW array is organized into 32,768 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q32FW has 1,024 erasable sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See Figure 2.)

FEATURES
● New Family of SpiFlash Memories
   – W25Q32FW: 32M-bit / 4M-byte
   – Standard SPI: CLK, /CS, DI, DO, /WP, /Hold
   – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold
   – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3
   – QPI: CLK, /CS, IO0, IO1, IO2, IO3
   – Software & Hardware Reset
● Highest Performance Serial Flash
   – 104MHz Single, Dual/Quad SPI clocks
   – 208/416MHz equivalent Dual/Quad SPI
   – 50MB/S continuous data transfer rate
   – Min 100K Program-Erase cycles per secto
   – More than 20-year data retention
● Efficient “Continuous Read” and QPI Mode
   – Continuous Read with 8/16/32/64-Byte Wrap
   – As few as 8 clocks to address memory
   – Quad Peripheral Interface (QPI) reduces instruction overhead
   – Allows true XIP (execute in place) operation
   – Outperforms X16 Parallel Flash
● Flexible Architecture with 4KB sectors
   – Uniform Sector/Block Erase (4K/32K/64K-Byte)
   – Program 1 to 256 byte per programmable page
   – Erase/Program Suspend & Resume
● Advanced Security Features
   – Software and Hardware Write-Protect
   – Power Supply Lock-Down and OTP protection
   – Top/Bottom, Complement array protection
   – Individual Block/Sector array protection
   – 64-Bit Unique ID for each device
   – Discoverable Parameters (SFDP) Register
   – 3X256-Bytes Security Registers with OTP locks
   – Volatile & Non-volatile Status Register Bits
● Space Efficient Packaging
   – 8-pin SOIC/VSOP 208-mil, XSON 4x4-mm
   – 8-pad WSON 6x5-mm / 8x6-mm
   – 16-pin SOIC 300-mil (additional /RESET)
   – 24-ball TFBGA 8x6-mm(additional /RESET)
   – 12-ball WLCSP
   – Contact Winbond for KGD and other options

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