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LC78681KE-L View Datasheet(PDF) - SANYO -> Panasonic

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LC78681KE-L Datasheet PDF : 24 Pages
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Ordering number : EN4969
CMOS LSI
LC78681KE, 78681KE-L
Digital Signal Processor for
Compact Disc Players
Overview
The LC78681KE and LC78681KE-L are signal processing
and servo control CMOS LSIs for compact disk players,
laser disk players, CD-V, CD-I and similar applications.
These products provide a rich set of signal processing
functions, including demodulation of the EFM signal from
the optical pickup, de-interleaving, error detection and
correction, and digital filter functions that can contribute
to end product cost reduction. These LSIs also process
servo system commands sent from a control
microprocessor. They can be directly interfaced to a serial
input DAC (such as the Sanyo LC78835K or LC78855K)
that provides built-in dedicated digital filters.
Functions
• Input signal processing: The LC78681KE takes an HF
signal as input, digitizes (slices) that signal at a precise
level, converts that signal to an EFM signal, and
generates a PLL clock with an average frequency of
4.3218 MHz by comparing the phases of that signal and
a VCO output.
• Precise reference clock and necessary internal timing
generation using an external 16.9344 MHz crystal
oscillator
• Disk motor speed control using a frame phase difference
signal generated from the playback clock and the
reference clock
• Frame synchronization signal detection, protection and
interpolation to assure stable data readout
• EFM signal demodulation and conversion to 8-bit
symbol data
• Subcode data separation from the EFM demodulated
signal and output of that data to an external
microprocessor
• Subcode Q signal output to a microprocessor over the
serial interface after performing a CRC error check (An
LSB first output format can be selected.)
• Demodulated EFM signal buffering in internal RAM to
handle up to ±4 frames of disk rotational jitter
• Demodulated EFM signal reordering in the prescribed
order for data unscrambling and de-interleaving
• Error detection, correction, and flag processing (error
correction scheme: dual C1 plus dual C2 correction)
• The LC78681KE sets the C2 flags based on the C1 flags
and a C2 check, and then performs signal interpolation
or previous value hold depending on the C2 flags. The
interpolation circuit uses a quadruple interpolation
scheme. The output value is locked at zero when four or
more consecutive C2 flags occur.
• Support for command input from a control
microprocessor: commands include track jump, focus
start, disk motor start/stop, muting on/off and track
count (8 bit serial input)
• Built-in digital output circuits.
• Arbitrary track counting to support high-speed data
access
• Zero cross muting
• Double speed dubbing support
• Supports most D/A converters
• Built-in digital level and peak meter functions
• Support for bilingual applications
Features
• 64-pin QFP (miniature, reduced space package)
• Silicon gate CMOS process (low power)
• Provision of a DEMO pin eases the manufacturing
processes associated with adjustment steps.
• Low voltage operation (LC78681KE-L)
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
20695TH (OT) No. 4969-1/24
 

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