NT68275 View Datasheet(PDF) - Novatek Microelectronics
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Description
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NT68275 Datasheet PDF : 38 Pages
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NT68275
(13) Reset Flag Control Registers
7
Row
15
Column
23
6
5
4
3
2
1
0
RESETFLG
Bit 1: RESTFLG – A system resetwill clear this bit. User can set this bit first and detect if
internal reset circuit has reset the system.
This bit can be read back through IIC bus by external master device, for example MCU.
The other bits are reserved.
(14) Reserved Control Register: Row 15, Column 24 & 31
7
6
5
4
3
2
1
0
Row
15
Column
Reserved
24
This control register is reserved and any data can not be written into this register.
7
6
5
4
3
2
1
0
Row
15
Column
Reserved
31
This control register is reserved and any data can not be written into this register.
IIC Bus Read Mode Operation:
Type
(a)
(1)
START
Condition
(2)
OSD Slave
Address ‘$7B’
8 bits
3 ---- 1 bytes data ----4
(3)
Row15 Column 23
Data
8 bits
(4)
STOP
Condition
User must read these bytes of data sequentially and can abort transmission by sending NAK (no acknowledge),
Repeat START condition or STOP condition. Every time user sends the START condition (including Repeat
START) and slave address $7B, the NT68275 will respond ACK and then transmit the first byte (content of row5
column3 register). It is prohibited to read more than 1 byte of data.
23
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