CXP921064A View Datasheet(PDF) - Sony Semiconductor
Part Name
Description
View to exact match
CXP921064A Datasheet PDF : 33 Pages
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Pin
Circuit format
PB5/SO3
SO3
PB register
Internal data bus
"0" after a reset
RD
PBSL register
"0" after a reset
SO3 output enable
0
MPX
1
CXP921064A
After a reset
Hi-Z
PB6/SCK3
SCK3
PB register
Internal data bus
"0" after a reset
RD
PBSL register
"0" after a reset
SCK3 output enable
0
MPX
1
IP
SCK3
CMOS Schmitt input
PC0/SDA0
PC1/SCL0
PC2/SDA1
PC3/SCL1
PULC register
∗
"0" after a reset
SDA0, SCL0, SDA1, SCL1
PC register
1
MPX
0
Underfined after a reset
PCSL register
"0" after a reset
PCD register
"0" after a reset
Internal data bus
RD
SDA0, SCL0
SDA1, SCL1
IP
CMOS Schmitt input
∗ Pull-up transistor
approximately 15kΩ (VDD = 2.7 to 3.3V)
–9–
Hi-Z
Hi-Z
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