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74ACT273M View Datasheet(PDF) - STMicroelectronics

Part Name
Description
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74ACT273M
ST-Microelectronics
STMicroelectronics ST-Microelectronics
74ACT273M Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
®
74ACT273
OCTAL D-TYPE FLIP FLOP WITH CLEAR
s HIGH SPEED:
fMAX = 190 MHz ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 8 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN), VIL = 0.8V (MAX)
s 50TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT273 is a high-speed CMOS OCTAL
D-TYPE FLIP FLOP WITH CLEAR fabricated
with sub-micron silicon gate and double-layer
metal wiring C2MOS technology. It is ideal for low
power applications mantaining high speed
operation similar to equivalent Bipolar Schottky
TTL.
PRELIMINARY DATA
B
(Plastic Package)
ORDER CODES :
74ACT273B
74ACT273M
74ACT273T
M
(Micro Package)
T
(TSSOP Package)
Information signals applied to D inputs are
transfered to the Q output on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independentely of the other inputs .
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
May 1999
1/11
 

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