datasheetbank_Logo   Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site
Part Name :   

ADC0808MFK View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
ADC0808MFK CMOS ANALOG-TO-DIGITAL CONVERTER WITH 8-CHANNEL ΜULTIPLEXER TI
Texas Instruments TI
ADC0808MFK Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
ą
ADC0808M
CMOS ANALOGĆTOĆDIGITAL CONVERTER
WITH 8ĆCHANNEL MULTIPLEXER
SGLS005A − D2642, NOVEMBER 1986 − REVISED MAY 1988
PRINCIPLES OF OPERATION
The ADC0808M consists of an analog signal multiplexer, an 8-bit successive-approximation converter, and
related control and output circuitry.
multiplexer
The analog multiplexer selects 1 of 8 single-ended input channels as determined by the address decoder.
Address load control loads the address code into the decoder on a low-to-high transition. The output latch is
reset by the positive-going edge of the start pulse. Sampling also starts with the positive-going edge of the start
pulse and lasts for 32 clock periods. The conversion process may be interrupted by a new start pulse before
the end of 64 clock periods. The previous data will be lost if a new start of conversion occurs before the 64th
clock pulse. Continuous conversion may be accomplished by connecting the End-of-Conversion output to the
start input. If used in this mode an external pulse should be applied after power up to assure start up.
converter
The CMOS threshold detector in the successive-approximation conversion system determines each bit by
examining the charge on a series of binary-weighted capacitors (Figure 2). In the first phase of the conversion
process, the analog input is sampled by closing switch SC and all ST switches, and by simultaneously charging
all the capacitors to the input voltage.
In the next phase of the conversion process, all ST and SC switches are opened and the threshold detector
begins identifying bits by identifying the charge (voltage) on each capacitor relative to the reference voltage.
In the switching sequence, all eight capacitors are examined separately until all 8 bits are identified, and then
the charge-convert sequence is repeated. In the first step of the conversion phase, the threshold detector looks
at the first capacitor (weight = 128). Node 128 of this capacitor is switched to the reference voltage, and the
equivalent nodes of all the other capacitors on the ladder are switched to REF−. If the voltage at the summing
node is greater than the trip-point of the threshold detector (approximately one-half the VCC voltage), a bit is
placed in the output register, and the 128-weight capacitor is switched to REF−. If the voltage at the summing
node is less than the trip point of the threshold detector, this 128-weight capacitor remains connected to REF+
through the remainder of the capacitor-sampling (bit-counting) process. The process is repeated for the
64-weight capacitor, the 32-weight capacitor, and so forth down the line, until all bits are counted.
With each step of the capacitor-sampling process, the initial charge is redistributed among the capacitors.The
conversion process is successive approximation, but relies on charge redistribution rather than a
successive-approximation register (and reference DAC) to count and weigh the bits from MSB to LSB.
SC
Threshold
Detctor
128
Node 128
64
REF+
32
REF+
16
REF+
8
REF+
4
REF+
2
REF+
1
REF+
1
REF+
REF−
REF−
REF−
REF−
REF−
REF−
REF−
REF−
REF−
ST
ST
ST
ST
ST
ST
ST
ST
ST
Vin
Figure 2. Simplified Model of the Successive-Approximation System
To
Output
Latches
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
7
Direct download click here
 

Share Link : TI
All Rights Reserved © datasheetbank.com 2014 - 2019 [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]