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HCPL-0452-500E View Datasheet(PDF) - Avago Technologies

Part Name
Description
View to exact match
HCPL-0452-500E
AVAGO
Avago Technologies AVAGO
HCPL-0452-500E Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
Package Characteristics
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified.
Parameter
Sym. Device
Min. Typ.* Max. Units Test Conditions
Fig. Note
Input-Output
VISO
8-Pin DIP
3750
V rms RH < 50%,
6, 11
Momentary
SO-8
t = 1 min.,
Withstand Widebody
Voltage**
5000 TA = 25°C
6, 12
8-Pin DIP
5000
6, 9,
(Option 020) 12
II-O
8-Pin DIP
1
µA
45% RH, t = 5 s,
VI-O = 3 kVdc,
TA = 25°C
Input-Output
RI-O
Resistance
8-Pin DIP
SO-8
1012 Ω
VI-O = 500 Vdc
6, 13
6
Widebody
1012
1013 TA = 25°C
1011 TA = 100°C
Input-Output
CI-O
Capacitance
8-Pin DIP
SO-8
0.6
pF
f = 1 MHz
6
Widebody 0.5
0.6
*All typicals at TA = 25°C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-5 Insulation Related Characteristics Table (if applicable), your
equipment level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage,” publication num-
ber 5963-2203E.
Notes:
  1.  Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C (SO-8).
  2.  Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C (SO-8).
  3.  Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 1.1 mW/°C (SO-8).
  4.  Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 2.3 mW/°C (SO-8).
  5.  CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100.
  6.  Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
  7.  Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common
mode pulse signal, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a
Logic Low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the
output will remain in a Logic Low state (i.e., VO < 0.8 V).
  8.  The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and the 5.6 kΩ pull-up resistor.
  9.  See Option 020 data sheet for more information.
10.  Use of a 0.1 µf bypass capacitor connected between pins 5 and 8 is recommended.
11.  In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (leakage
detection current limit, II-O ≤ 5 µA). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-5 Insulation
Related Characteristics Table if applicable.
12.  In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (leakage
detection current limit, II-O ≤ 5 µA). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-5 Insulation
Related Characteristics Table if applicable.
13.  This rating is equally validated by an equivalent ac proof test.
12
 

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