CXP86213/86217, CXP86325/86333, CXP86441/86449/86461
(6) OSD timing
(Ta = –20 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V reference)
Item
Symbol Pins Conditions Min.
Max Unit
OSD clock frequency
fOSC
EXLC
XLC
Fig. 11
4
HSYNC pulse width
VSYNC pulse width
tHWD HSYNC Fig. 10
2
tVWD VSYNC Fig. 10
1
HSYNC afterwrite rise and fall
times
tHCG
HSYNC Fig. 10
VSYNC beforewrite rise and fall
times
tVCG
VSYNC Fig. 10
∗1 The maximum value of fosc is specified with the following equation.
fosc [max] ≤ fc × 1.9
∗2 H indicates 1HSYNC period.
28∗1 MHz
µs
H∗2
200 ns
1.0
µs
Fig. 10. OSD timing
tHWD
tHCG
HSYNC
For OSD I/O polarity register
(OPOL: 01FEh)
bit 7 at “0”
0.8VDD
0.2VDD
VSYNC
For OSD I/O polarity register
(OPOL: 01FEh)
bit 6 at “0”
tVCG
tVWD
0.8VDD
0.2VDD
Fig. 11. LC oscillation circuit connection
EXLC
L
C1
XLC
R∗1
C2
∗1 The series resistor for XLC is used to reduce the frequency of occurrence of the undesired radiation.
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