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74ACQ574PC View Datasheet(PDF) - Fairchild Semiconductor

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Description
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74ACQ574PC Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Logic Symbols
IEEE/IEC
Logic Diagram
Functional Description
The ACQ/ACTQ574 consists of eight edge-triggered flip-
flops with individual D-type inputs and 3-STATE true out-
puts. The buffered clock and buffered Output Enable are
common to all flip-flops. The eight flip-flops will store the
state of their individual D-type inputs that meet the setup
and hold time requirements on the LOW-to-HIGH Clock
(CP) transition. With the Output Enable (OE) LOW, the
contents of the eight flip-flops are available at the outputs.
When OE is HIGH, the outputs go to the high impedance
state. Operation of the OE input does not affect the state of
the flip-flops.
Function Table
Inputs
Internal Outputs
OE CP D
Q
ON
Function
HH L
NC
Z Hold
H H H NC
 H
L
L
 H
H
H
 L
L
L
 L
H
H
Z Hold
Z Load
Z Load
L Data Available
H Data Available
LHL
NC
NC No Change in Data
L H H NC
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
NC = No Change
NC No Change in Data
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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