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ISL12022MAIBZ-T View Datasheet(PDF) - Intersil

Part NameDescriptionManufacturer
ISL12022MAIBZ-T Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving Intersil
Intersil Intersil
ISL12022MAIBZ-T Datasheet PDF : 29 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ISL12022MA
Block Diagram
SDA
SCL
SDA
BUFFER
SCL
BUFFER
I2C
INTERFACE
CONTROL
LOGIC
REGISTERS
CRYSTAL
OSCILLATOR
RTC
DIVIDER
VDD
VTRIP
+-
VBAT
GND
POR
FREQUENCY
OUT
ALARM
SWITCH
INTERNAL
SUPPLY
TEMPERATURE
SENSOR
FREQUENCY
CONTROL
SECONDS
MINUTES
HOURS
DAY OF WEEK
DATE
MONTH
YEAR
CONTROL
REGISTERS
USER
SRAM
IRQ/FOUT
Pin Configuration
ISL12022MA
(20 LD SOIC)
TOP VIEW
GNC
1
20
GND
2
19
GND
3
18
NC
4
17
NC
5
16
NC
6
15
VBAT
7
14
GND
8
13
NC
9
12
NC
10
11
GND
GND
GND
NC
NC
NC
VDD
IRQ/FOUT
SCL
SDA
Pin Descriptions
PIN
NUMBER
4, 5, 6, 9,
10, 15, 16,
17
7
11
SYMBOL
DESCRIPTION
NC
No Connection. Do not connect to a signal or supply voltage.
VBAT
SDA
Backup Supply. This input provides a backup supply voltage to the device. VBAT supplies power to
the device in the event that the VDD supply fails. This pin can be connected to a battery, a
supercapacitor or tied to ground if not used. See the Battery Monitor parameter in the “DC Operating
Characteristics RTC” table on page 5. This pin should be tied to ground if not used.
Serial Data. SDA is a bi-directional pin used to transfer data into and out of the device. It has an
open drain output and may be OR’ed with other open drain or open collector outputs. The input buffer
is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor. The output circuitry controls the fall time
of the output signal with the use of a slope controlled pull-down. The circuit is designed for 400kHz
I2C interface speeds. It is disabled when the backup power supply on the VBAT pin is activated.
2
FN7575.1
July 9, 2010
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