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STK10C48-PF35I View Datasheet(PDF) -

Part Name
Description
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STK10C48-PF35I
 
STK10C48-PF35I Datasheet PDF : 0 Pages
STK10C48
MODE SELECTION
E
W
G
NE
MODE
POWER
H
X
X
X
Not Selected
Standby
L
H
L
H
Read SRAM
Active
L
L
X
H
L
H
L
L
Write SRAM
Nonvolatile RECALLk
Active
Active
L
L
H
L
L
L
L
L
L
H
H
X
Nonvolatile STORE
No Operation
ICC2
Active
Note k: An automatic RECALL takes place at power up, starting when VCC exceeds 4.25V and taking tRESTORE.
STORE CYCLES #1 & #2
(VCC = 5.0V ± 10%)
NO.
#1
SYMBOLS
#2
Alt.
PARAMETER
MIN
MAX
UNITS
22
tWLQXl
23
tWLNHm
tELQX
tELNH
tSTORE
tWC
STORE Cycle Time
STORE Initiation Cycle Time
10
ms
20
ns
24
tGHNL
Output Disable Set-up to NE Fall
0
ns
25
tGHEL
Output Disable Set-up to E Fall
0
ns
26
tNLWL
tNLEL
NE Set-up
0
ns
27
tELWL
Chip Enable Set-up
0
ns
28
tWLEL
Write Enable Set-up
0
ns
Note l: Measured with W and NE both returned high, and G returned low. STORE cycles are inhibited below 4.0V.
Note m: Once tWC has been satisfied by NE, G, W and E, the STORE cycle is completed automatically. Any of NE, G, W or E may be used to terminate
the STORE initiation cycle.
Note n: If E is low for any period of time in which W is high while G and NE are low, then a RECALL cycle may be initiated.
STORE CYCLE #1: W Controlledn
NE
G
24
tGHNL
26
tNLWL
W
27
E
tELWL
DQ (DATA OUT)
HIGH IMPEDANCE
STORE CYCLE #2: E Controlledn
26
tNLEL
NE
25
tGHEL
G
28
tWLEL
W
E
DQ (DATA OUT)
HIGH IMPEDANCE
23
tWLNH
22
tWLQX
23
tELNH
22
tELQX
March 2006
5 Document Control # ML0002 rev 0.2
 

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