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FDS6961AZ View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
FDS6961AZ
Fairchild
Fairchild Semiconductor Fairchild
FDS6961AZ Datasheet PDF : 5 Pages
1 2 3 4 5
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BV DSS
Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA
30
V
BV DSS
TJ
IDSS
IGSSF
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
ID = 250 µA, Referenced to 25°C
VDS = 24 V, VGS = 0 V
VDS = 24 V, VGS = 0 V, TJ = 55°C
VGS = 20 V, VDS = 0 V
24
mV/°C
1
µA
10
10
µA
IGSSR
Gate–Body Leakage, Reverse
VGS = –20 V, VDS = 0 V
–10 µA
On Characteristics (Note 2)
V GS(th)
Gate Threshold Voltage
V GS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on)
On–State Drain Current
gFS
Forward Transconductance
VDS = VGS, ID = 250 µA
1
ID = 250 µA, Referenced to 25°C
VGS = 10 V, ID = 3.5 A
VGS = 4.5 V, ID = 2.8 A
VGS = 10 V, ID = 3.5 A, TJ = 125°C
VGS = 10 V, VDS = 5 V
14
VDS = 5 V,
ID = 3.5 A
1.9 3
V
–4
mV/°C
70 90 m
90 140
104 143
A
8
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 15 V, V GS = 0 V,
f = 1.0 MHz
216
pF
48
pF
21
pF
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
(Note 2)
VDD = 15 V,
VGS = 10 V,
ID = 1 A,
RGEN = 6
VDS = 15 V, ID = 3.5 A,
VGS = 5 V
6.5 13
ns
5
10
ns
9.5 19
ns
2
4
ns
2.1 3
nC
0.9
nC
0.7
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
VGS = 0 V, IS = 1.3 A (Note 2)
Voltage
1.3
A
0.8 1.2
V
Notes:
1. RθJAis the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCAis determined by the user's board design.
a) 78°C/W when
mounted on a 0.5in2
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
in2 pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied
FDS6961AZ Rev C (W)
 

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