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74HC125D View Datasheet(PDF) - Philips Electronics

Part NameDescriptionManufacturer
74HC125D Quad buffer/line driver; 3-state Philips
Philips Electronics Philips
74HC125D Datasheet PDF : 6 Pages
1 2 3 4 5 6
Philips Semiconductors
Quad buffer/line driver; 3-state
Product specification
74HC/HCT125
FEATURES
Output capability: bus driver
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT125 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled
by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a HIGH impedance OFF-state.
The “125” is identical to the “126” but has active LOW enable inputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/ tPLH
CI
CPD
propagation delay nA to nY
input capacitance
power dissipation capacitance per buffer
CL = 15 pF; VCC = 5 V
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
(CL × VCC2 × fo) = sum of outputs
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
TYPICAL
HC
9
3.5
22
HCT
12
3.5
24
UNIT
ns
pF
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2
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