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N25Q032A21EF640E View Datasheet(PDF) - Micron Technology

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N25Q032A21EF640E Datasheet PDF : 82 Pages
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32Mb, 1.8V, Multiple I/O Serial Flash Memory
Signal Descriptions
Table 1: Signal Descriptions (Continued)
Symbol
HOLD#
W#
VPP
VCC
VSS
DNU
NC
Type
Control
Input
Control
Input
Power
Power
Ground
Description
HOLD: Pauses any serial communications with the device without deselecting the device. DQ1
(output) is High-Z. DQ0 (input) and the clock are "Don't Care." To enable HOLD, the device
must be selected with S# driven LOW.
HOLD# is used for input/output during the following operations: QUAD OUTPUT FAST READ,
QUAD INPUT/OUTPUT FAST READ, QUAD INPUT FAST PROGRAM, and QUAD INPUT EXTENDED
FAST PROGRAM.
In QIO-SPI, HOLD# acts as an I/O (DQ3 functionality), and the HOLD# functionality is disabled
when the device is selected. When the device is deselected (S# is HIGH) in parts with RESET#
functionality, it is possible to reset the device unless this functionality is not disabled by means
of dedicated registers bits.
The HOLD# functionality can be disabled using bit 4 of the NVCR or bit 4 of the VECR.
On devices that include DTR mode capability, the HOLD# functionality is disabled as soon as a
DTR operation is recognized.
Write protect: W# can be used as a protection control input or in QIO-SPI operations. When in
extended SPI with single or dual commands, the WRITE PROTECT function is selectable by the
voltage range applied to the signal. If voltage range is low (0V to VCC), the signal acts as a
write protection control input. The memory size protected against PROGRAM or ERASE opera-
tions is locked as specified in the status register block protect bits 3:0.
W# is used as an input/output (DQ2 functionality) during QUAD INPUT FAST READ and QUAD
INPUT/OUTPUT FAST READ operations and in QIO-SPI.
Supply voltage: If VPP is in the voltage range of VPPH, the signal acts as an additional power
supply, as defined in the AC Measurement Conditions table.
During QIFP, QIEFP, and QIO-SPI PROGRAM/ERASE operations, it is possible to use the addition-
al VPP power supply to speed up internal operations. However, to enable this functionality, it is
necessary to set bit 3 of the VECR to 0.
In this case, VPP is used as an I/O until the end of the operation. After the last input data is shif-
ted in, the application should apply VPP voltage to VPP within 200ms to speed up the internal
operations. If the VPP voltage is not applied within 200ms, the PROGRAM/ERASE operations
start at standard speed.
The default value of VECR bit 3 is 1, and the VPP functionality for quad I/O modify operations is
disabled.
Device core power supply: Source voltage.
Ground: Reference for the VCC supply voltage.
Do not use.
No connect.
PDF: 09005aef84566617
n25q_32mb_1_8v_65nm.pdf - Rev. E 6/12 EN
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2012 Micron Technology, Inc. All rights reserved.
 

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