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ML12009-5P View Datasheet(PDF) - LANSDALE Semiconductor Inc.

Part NameDescriptionManufacturer
ML12009-5P MECL PLL Components Dual Modulus Prescaler LANSDALE
LANSDALE Semiconductor Inc. LANSDALE
ML12009-5P Datasheet PDF : 14 Pages
First Prev 11 12 13 14
ML12009, ML12011
LANSDALE Semiconductor, Inc.
Figure 7. State Diagram
DIVIDE BY 5/6 (ML12009/ML12509)
Enable = 0
Q1 Q2 Q3
111
011
001
000
100
110
Enable = 1
111
011
001
010
101
110
100
000
Enable = 1
DIVIDE BY 8/9 (ML12011)
0101
0010
1000
1100
1010
Q1 Q2 Q3 Q4
1111
0111
0011
1110
0110
0000
0111
1111
1001
Enable = 0
1101
Enable = 1
0001
0110
0010
1000
1100
Enable = 1
1101
1001
0011
1011
0100
APPLICATIONS INFORMATION
The primary application of these devices is as a
high–speed variable modulus prescaler in the divide by N
section of a phase–locked loop synthesizer used as the local
oscillator of two–way radios.
Proper VHF termination techniques should be followed
when the clock is separated from the prescaler by any
appreciable distance.
In their basic form, these devices will divide by 5/6 or 8/9.
Division by 5, or 8 occurs when any one or all of the five gate
inputs E1 through E5 are high. Division by 6, or 9 occurs
when all inputs E1 through E5 are low. (Unconnected MTTL
inputs are normally high, unconnected MECL inputs are
normally low). With the addition of extra parts, many different
division configurations may be obtained.
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