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STE53NA50 View Datasheet(PDF) - New Jersey Semiconductor

Part NameDescriptionManufacturer
STE53NA50 N-CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR NJSEMI
New Jersey Semiconductor NJSEMI
STE53NA50 Datasheet PDF : 4 Pages
1 2 3 4
STE53NA50
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol
Parameter
td(on)
tr
Turn-on Time
Rise Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgti
Gate-Drain Charge
Test Conditions
VDD = 250 V ID = 27 A
Ro=4.7ii VGS = 10V
(see test circuit, figure 1)
VDD = 400 V ID = 53 A VGS = 10 V
Min.
Typ.
57
92
Max.
80
130
Unit
ns
ns
470 658
nC
54
nC
219
nC
SWITCHING OFF
Symbol
tr(Voff)
t!
to
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 400 V
ID = 53 A
RG = 4.7 Q
VGS = 10 V
(see test circuit, figure 3)
Min.
Typ.
105
36
145
Max.
145
50
205
Unit
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
ISD
ISDM(')
Source-drain Current
Source-drain Current
(pulsed)
VSD (*) Forward On Voltage
I so = 53 A
VGS = 0
trr
Reverse Recovery
ISD = 53 A di/dt = 100 A/us
Time
; V R = 100 V Tj = 150 °C
Qrr
Reverse Recovery
(see test circuit, figure 3)
Charge
IRRM
Reverse Recovery
Current
t) Pulsed: Pulse duration - 300 (.is, duty cycle 1.5 %
(*) Pulse width limited by safe operating area
Min.
Typ.
Max.
53
212
Unit
A
A
1.6
V
1000
ns
31.5
MC
63
A
Safe Operating Area for
Thermal Impedance
10
I02
10 * IC'-5 10 ? 10
10° tF Cs
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