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74VCX16244G View Datasheet(PDF) - Fairchild Semiconductor

Part NameDescriptionManufacturer
74VCX16244G Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs Fairchild
Fairchild Semiconductor Fairchild
74VCX16244G Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
DC Electrical Characteristics (Continued)
Symbol
Parameter
VOL
LOW Level Output Voltage
II
Input Leakage Current
IOZ
3-STATE Output Leakage
IOFFI
ICC
Power-OFF Leakage Current
Quiescent Supply Current
'ICC
Increase in ICC per Input
Note 7: Outputs disabled or 3-STATE only.
Conditions
IOL 100 PA
IOL 12 mA
IOL 18 mA
IOL 24 mA
IOL 100 PA
IOL 12 mA
IOL 18 mA
IOL 100 PA
IOL 6 mA
IOL 100 PA
IOL 2 mA
IOL 100 PA
0 d VI d 3.6V
0 d VO d 3.6V
VI VIH or VIL
0 d (VI, VO) d 3.6V
VI VCC or GND
VCC d (VI, VO) d 3.6V (Note 7)
VIH VCC 0.6V
VCC
Min
(V)
2.7 - 3.6
2.7
3.0
3.0
2.3 - 2.7
2.3
2.3
1.65 - 2.3
1.65
1.4 - 1.6
1.4
1.2
1.2 - 3.6
1.2 - 3.6
0
1.2 - 3.6
1.2 - 3.6
2.7 - 3.6
Max
0.2
0.4
0.4
0.55
0.2
0.4
0.6
0.2
0.3
0.2
0.35
0.05
r5.0
r10.0
10.0
20.0
r20.0
750
Units
V
PA
PA
PA
PA
PA
AC Electrical Characteristics (Note 8)
Symbol
Parameter
Conditions
VCC
TA 40qC to 85qC Units Figure
(V)
Min
Max
Number
tPHL
Propagation Delay
tPLH
CL 30 pF, RL 500:
3.3 r 0.3
0.8
2.5
2.5 r 0.2
1.0
3.0
Figures
1, 2
1.8 r 0.15 1.5
6.0
ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.0
12.0
1.2
1.5
30.0
Figures
5, 6
tPZL
tPZH
Output Enable Time
CL 30 pF, RL 500:
3.3 r 0.3
0.8
3.5
2.5 r 0.2
1.0
4.1
Figures
1, 3, 4
1.8 r 0.15 1.5
8.2
ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.0
16.4
1.2
1.5
41.0
Figures
5, 7, 8
tPLZ
tPHZ
Output Disable Time
CL 30 pF, RL 500:
3.3 r 0.3
0.8
3.5
2.5 r 0.2
1.0
3.8
Figures
1, 3, 4
1.8 r 0.15 1.5
6.8
ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.0
13.6
1.2
1.5
34.0
Figures
5, 7, 8
tOSHL
tOSLH
Output to Output Skew
(Note 9)
CL 30 pF, RL 500:
3.3 r 0.3
2.5 r 0.2
1.8 r 0.15
0.5
0.5
0.75
ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.5
1.2
1.5
Note 8: For CL 50PF, add approximately 300 ps to the AC maximum specification.
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
5
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