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LC72323 View Datasheet(PDF) - SANYO -> Panasonic

Part NameDescriptionManufacturer
LC72323 Single-Chip Microcontroller with PLL and LCD Driver SANYO
SANYO -> Panasonic SANYO
LC72323 Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LC72323
Continued from preceding page.
Pin
HCTR
LCTR
Pin No.
70
Functions
Universal counter input
The input should be capacitor coupled.
The input frequency range is from 0.4 to 12 MHz.
This input can be effectively used for FM IF or AM IF counting.
Universal counter input
The input should be capacitor coupled for input frequencies in
the range 100 to 150 kHz.
71
Capacitor coupling is not required for input frequencies from
1 to 20 Hz.
This input can be effectively used for AM IF counting.
This pin can also be used as a normal input port.
I/O
Input
A/D converter input
ADI
69
A 1.28 ms period is required for a 6-bit sequential comparison
Input
conversion. The full scale input is ((63/96) · VDD) for a data
value of 3FH.
INT
EO1
EO2
External interrupt request input
66
An interrupt is generated when the INTEN flag is set (by an
SS instruction) and a falling edge is input.
This pin can also be used as a normal input port.
Input
Reference frequency and programmable divider phase
77
comparison error outputs
78
Charge pump circuits are built in.
EO1 and EO2 are the same.
Output
SNS
HOLD
RES
Input pin used to determine if a power outage has occurred in
72
BACKUP mode
Input
This pin can also be used as a normal input port.
Input pin used to force the LC72323 to HOLD mode
The LC72323 goes to HOLD mode when the HOLDEN flag is
67
set (by an SS instruction) and the HOLD input goes low.
Input
A high-breakdown voltage circuit is used so that this input can
be used in conjunction with the normal power switch.
System reset input
This signal should be held low for 75 ms after power is first
68
applied to effect a power-up reset.
The reset starts when a low level has been input for at least
six reference clock cycles.
Input
XIN
XOUT
Crystal oscillator connections
1
(4.5 MHz)
80
A feedback resistor is built in.
TEST1
TEST2
VDD
VSS
2
79
31, 73
76
LSI test pins. These pins must be connected to VSS.
Power supply
Input
Output
I/O circuit type
No. 4950-9/13
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