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T-ST508-DST-001 View Datasheet(PDF) - Unspecified

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T-ST508-DST-001
ETC
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T-ST508-DST-001 Datasheet PDF : 20 Pages
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T-ST508-DST-001
1. Functional Description
Data Sheet
RTC6218(RL508)
Mar. 2014
1.1. Overview
Figure 1. RL508 FM receiver block diagram
The RL508 is a monolithic FM receiver. It requires only one external bypass capacitor to minimize BOM cost and
design easily for the miniature application.
The RL508 supports only 2-wire interface. With an integrated regulator, it doesn’t need an external regulator, and it is
allowed to directly supply 2.0 to 3.6 V from battery.
1.2. FM Receiver
It uses optimized system architecture to lower the system cost and area, and recover FM broadcast signal with low
power consumption and to eliminate environmental noise with audio algorithm such as soft-mute and stereo-blending.
It integrates a low-noise amplifier (LNA), an automatic gain control (AGC) circuit, a quadrature mixer, two
programmable amplifiers (PGA), a pair of analog to digital converters (ADCs). The LNA supports FM broadcast band
(64MHz~108MHz). The AGC controls the gain of the LNA and PGA to adjust the input power to optimum signal
level for demodulation automatically. Proceeded by LNA, the quadrature mixer down-converts the RF signal to IF
signal. The IF signal is amplified, filtered, digitized, and then passed to a baseband processor to perform FM
demodulation. A MPX decoder provides stereo digital audio signals to a pair of digital to analog converters (DACs)
for generating high-quality stereo analog sound. The RL508 also integrates a frequency synthesizer and a voltage
controlled oscillator (VCO). Reference clock of synthesizer is 32.768 kHz, which can be provided by an external clock
source or build-in clock oscillator with off-chip crystal.
Specifications subject to change without notice
5
Rev0.1
Confidential Proprietary
 

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