AD9625 View Datasheet(PDF) - Analog Devices

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Description

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AD9625

12-Bit, 2.0 GSPS, 1.3 V/2.5 V Analog-to-Digital Converter

Analog Devices 

AD9625

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

DC Specifications ......................................................................... 3

AC Specifications.......................................................................... 4

Digital Specifications ................................................................... 4

Switching Specifications .............................................................. 6

Timing Specifications .................................................................. 6

Absolute Maximum Ratings ....................................................... 8

Thermal Characteristics .............................................................. 8

ESD Caution.................................................................................. 8

Pin Configuration and Function Descriptions............................. 9

Typical Performance Characteristics ........................................... 15

Equivalent Test Circuits ................................................................. 18

Theory of Operation ...................................................................... 19

ADC Architecture ...................................................................... 19

Fast Detect ................................................................................... 19

Gain Threshold Operation ........................................................ 19

Test Modes................................................................................... 20

Digital Downconverters (DDC) ................................................... 21

Frequency Synthesizer and Mixer ............................................ 21

High Bandwidth Decimator...................................................... 21

Low Bandwidth Decimator ....................................................... 22

Analog Input Considerations........................................................ 23

REVISION HISTORY

5/14—Revision 0: Initial Version

Data Sheet

Clock Input Considerations...................................................... 23

DC Coupling............................................................................... 23

Calibration................................................................................... 23

Digital Outputs ............................................................................... 24

Introduction to JESD204B Interface........................................ 24

Functional Overview ................................................................. 24

JESD204B Link Establishment ................................................. 25

Physical Layer Output................................................................ 29

Scrambler..................................................................................... 29

Tail Bits ........................................................................................ 29

DDC Modes (Single and Dual) ................................................ 29

CheckSum ................................................................................... 30

8-Bit/10-Bit Encoder Control ................................................... 30

Initial Lane Alignment Sequence (ILAS)................................ 30

Lane Synchronization ................................................................ 30

JESD204B Application Layers .................................................. 31

Frame Alignment Character Insertion.................................... 33

Thermal Considerations............................................................ 33

Power Supply Considerations ................................................... 33

Serial Port Interface (SPI).............................................................. 35

Configuration Using the SPI..................................................... 35

Hardware Interface..................................................................... 35

Memory Map .................................................................................. 36

Reading the Memory Map Register ......................................... 36

Memory Map Registers ............................................................. 36

Outline Dimensions ....................................................................... 54

Ordering Guide .......................................................................... 54

Rev. 0 | Page 2 of 56

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