AD9684 View Datasheet(PDF) - Analog Devices
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AD9684 Datasheet PDF : 64 Pages
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AD9684
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Table 10. DDC Samples When the Chip Decimation Ratio = 1
Real (I) Output (Complex to Real Enabled)
HB1 FIR
(DCM1 = 1)
HB2 FIR +
HB1 FIR
(DCM1 = 2)
HB3 FIR + HB2
FIR + HB1 FIR
(DCM1 = 4)
HB4 FIR + HB3 FIR
+ HB2 FIR + HB1
FIR (DCM1 = 8)
N
N
N
N
N+1
N+1
N+1
N+1
N+2
N
N
N
N+3
N+1
N+1
N+1
N+4
N+2
N
N
N+5
N+3
N+1
N+1
N+6
N+2
N
N
N+7
N+3
N+1
N+1
N+8
N+4
N+2
N
N+9
N+5
N+3
N+1
N + 10
N+4
N+2
N
N + 11
N+5
N+3
N+1
N + 12
N+6
N+2
N
N + 13
N+7
N+3
N+1
N + 14
N+6
N+2
N
N + 15
N+7
N+3
N+1
N + 16
N+8
N+4
N+2
N + 17
N+9
N+5
N+3
N + 18
N+8
N+4
N+2
N + 19
N+9
N+5
N+3
N + 20
N + 10
N+4
N+2
N + 21
N + 11
N+5
N+3
N + 22
N + 10
N+4
N+2
N + 23
N + 11
N+5
N+3
N + 24
N + 12
N+6
N+2
N + 25
N + 13
N+7
N+3
N + 26
N + 12
N+6
N+2
N + 27
N + 13
N+7
N+3
N + 28
N + 14
N+6
N+2
N + 29
N + 15
N+7
N+3
N + 30
N + 14
N+6
N+2
N + 31
N + 15
N+7
N+3
1 DCM means decimation.
Complex (I/Q) Outputs (Complex to Real Disabled)
HB1 FIR
(DCM1 = 2)
HB2 FIR +
HB1 FIR
(DCM1 = 4)
HB3 FIR + HB2
FIR + HB1 FIR
(DCM1 = 8)
HB4 FIR + HB3 FIR +
HB2 FIR + HB1 FIR
(DCM1 = 16)
N
N
N
N
N+1
N+1
N+1
N+1
N
N
N
N
N+1
N+1
N+1
N+1
N+2
N
N
N
N+3
N+1
N+1
N+1
N+2
N
N
N
N+3
N+1
N+1
N+1
N+4
N+2
N
N
N+5
N+3
N+1
N+1
N+4
N+2
N
N
N+5
N+3
N+1
N+1
N+6
N+2
N
N
N+7
N+3
N+1
N+1
N+6
N+2
N
N
N+7
N+3
N+1
N+1
N+8
N+4
N+2
N
N+9
N+5
N+3
N+1
N+8
N+4
N+2
N
N+9
N+5
N+3
N+1
N + 10
N+4
N+2
N
N + 11
N+5
N+3
N+1
N + 10
N+4
N+2
N
N + 11
N+5
N+3
N+1
N + 12
N+6
N+2
N
N + 13
N+7
N+3
N+1
N + 12
N+6
N+2
N
N + 13
N+7
N+3
N+1
N + 14
N+6
N+2
N
N + 15
N+7
N+3
N+1
N + 14
N+6
N+2
N
N + 15
N+7
N+3
N+1
Table 11. DDC Samples When the Chip Decimation Ratio = 2
Real (I) Output (Complex to Real Enabled)
Complex (I/Q) Outputs (Complex to Real Disabled)
HB2 FIR +
HB1 FIR
(DCM1 = 2)
N
N+1
N+2
N+3
N+4
N+5
N+6
N+7
N+8
N+9
HB3 FIR +
HB2 FIR +
HB1 FIR
(DCM1 = 4)
N
N+1
N
N+1
N+2
N+3
N+2
N+3
N+4
N+5
HB4 FIR +
HB3 FIR +
HB2 FIR +
HB1 FIR
(DCM1 = 8)
N
N+1
N
N+1
N
N+1
N
N+1
N+2
N+3
HB1 FIR
(DCM1 = 2)
N
N+1
N+2
N+3
N+4
N+5
N+6
N+7
N+8
N+9
HB2 FIR +
HB1 FIR
(DCM1 = 4)
N
N+1
N
N+1
N+2
N+3
N+2
N+3
N+4
N+5
HB3 FIR +
HB2 FIR +
HB1 FIR
(DCM1 = 8)
N
N+1
N
N+1
N
N+1
N
N+1
N+2
N+3
HB4 FIR +
HB3 FIR +
HB2 FIR +
HB1 FIR
(DCM1 = 16)
N
N+1
N
N+1
N
N+1
N
N+1
N
N+1
Rev. 0 | Page 34 of 64
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