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74V2G126CTR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
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74V2G126CTR
ST-Microelectronics
STMicroelectronics ST-Microelectronics
74V2G126CTR Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
74V2G126
DUAL BUS BUFFER (3-STATE)
s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN) at VCC = 4.5V
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2G126 is an advanced high-speed CMOS
DUAL BUS BUFFER fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
tecnology.
3-STATE control input nG has to be set LOW to
place the output into the high impedance state.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
SOT 23-8L
SOT 323-8L
ORDER CODES
PACKAGE
SOT23-8L
SOT323-8L
T&R
74V2G126STR
74V2G126CTR
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V systems
and it is ideal for portable applications like
personal digital assistant, camcorder and all
battery-powered equipment.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
November 2001
1/11
 

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