BR34L02FV-W View Datasheet(PDF) - ROHM Semiconductor

Part Name

Description

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BR34L02FV-W

256×8 bit Electrically Erasable PROM (based on Serial Presence Detect)

ROHM Semiconductor 

Memory ICs

BR34L02FV-W

zDevice operation

1) Start condition (Recognition of start bit)

• All commands are proceeded by the start condition, which is a HIGH to LOW transition of SDA when SCL is HIGH.

• The device continuously monitors the SDA and SCL lines for the start condition and will not respond to any

command until this condition has been met.

(See Fig.8 SYNCHRONOUS DATA TIMING)

2) Stop condition (Recognition of stop bit)

• All communications must be terminated by a stop condition, which is a LOW to HIGH transition of SDA when SCL is

HIGH.

(See Fig.8 SYNCHRONOUS DATA TIMING)

3) Notice about write command

• In the case that stop condition is not executed in WRITE mode, transferred data will not be written in a memory.

4) Device addressing

• Following a START condition, the master output the device address to be accessed.

The most significant four bits of the slave address are the “device type identifier”.

For the device this is fixed as “1010”.

(In access to WP resister, this code use “0110”.)

• The next three bit (device address) address a particular to the bus.

The device address is defined by the start of A0, A1 and A2 input pins. This IC works only when the device address

inputted from SDA pin correspond to the state of A0, A1 and A2 input pins. Using this address scheme, up to eight

device may be connected, to the bus. The last bit of the stream (R/W - - - READ/WRITE) determines the operation

to the performed.

R/W=0

WRITE (including word address input of Random Read)

R/W=1

READ

Device Type

1010

0110

Device Address

A2 A1 A0

A2 A1 A0

R/W

R/W

Access to Memory

Access to Write Protect Resister

5) Write protect command

• Write Protect Command is to cancel any write command, which access to the address 00 to 7Fh.

Write Protect Resister can be written for once. (Onetime Rom)

Once this command is executed, the data is protected forever.

6) Write protect pin (WP)

• When WP pin set to VCC (H level), write protect is set for 256words (all address).

When WP pin set to GND (L level), it is enable to write 256words (all address).

If permanent protection is done by Write Protect command, lower half area (00 to 7Fh address) is inhibited writing

regardless of WP pin state.

WP pin has a Pull-Down resister. Please be left unconnected or connect to GND when WP feature is not in use.

Rev.A

8/24

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