Z0409SF1AA2 View Datasheet(PDF) - STMicroelectronics
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Z0409SF1AA2 Datasheet PDF : 6 Pages
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Z04 Series
Fig. 1: Maximum power dissipation versus RMS
on-state current (full cycle).
P(W)
7
6
5
4
3
2
1
IT(RMS)(A)
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Fig. 2: RMS on-state current versus ambient
temperature (full cycle).
IT(RMS)(A)
4.5
4.0
Rth(j-a)=Rth(j-l)
3.5
3.0
2.5
2.0
1.5
1.0
Rth(j-a)=100°C/W
0.5
0.0
0
Tamb(°C)
25
50
75
100
125
Fig. 3: Relative variation of thermal impedance
junction to ambient versus pulse duration.
K=[Zth(j-a)/Rth(j-a)]
1E+0
1E-1
1E-2
1E-3
1E-3
1E-2
tp(s)
1E-1 1E+0
1E+1
1E+2 5E+2
Fig. 4: Relative variation of gate trigger current,
holding current and latching current versus
junction temperature (typical values).
IGT,IH,IL [Tj] / IGT,IH,IL [Tj=25°C]
2.5
2.0
IGT
1.5
IH & IL
1.0
0.5
Tj(°C)
0.0
-40 -20 0 20 40 60 80 100 120 140
Fig. 5: Surge peak on-state current versus
number of cycles.
Fig. 6: Non-repetitive surge peak on-state
current for a sinusoidal pulse with width
tp < 10ms, and corresponding value of I²t.
ITSM(A)
25
20
15
10
5
0
1
Non repetitive
Tj initial=25°C
Repetitive
Tamb=25°C
Number of cycles
10
100
t=20ms
One cycle
1000
ITSM (A), I²t (A²s)
500
100
dI/dt limitation:
20A/µs
10
1
0.01
tp (ms)
0.10
1.00
Tj initial=25°C
ITSM
I²t
10.00
4/6
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