ISL71840SEH View Datasheet(PDF) - Intersil
Part Name
Description
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ISL71840SEH Datasheet PDF : 27 Pages
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ISL71840SEH
Timing Diagrams
+4.0V
+0.8V
ISL71840SEH
50Ω
A3
IN01
A2
A1
IN02-IN15
A0
IN16
+0.8V EN
OUT
+15V, 0V
0V, +15V
10kΩ
VOUT
50pF
FIGURE 4. ADDRESS TIME TO OUTPUT TEST CIRCUIT
ISL71840SEH
A3
IN01
A2
A1
IN02-IN16
A0
+10V
+4.0V
+0.8V
EN
OUT
50Ω
VOUT
1kΩ
50pF
FIGURE 6. TIME TO ENABLE/DISABLE OUTPUT TEST CIRCUIT
ISL71840SEH
A3
IN01
+5V
+4.0V
A2
A1
IN02-IN15
50Ω
A0
IN16
+0.8V
+0.8V EN
OUT
VOUT
1kΩ
50pF
FIGURE 8. BREAK-BEFORE-MAKE TEST CIRCUIT
ISL71840SEH
A3
IN01
0V
A2
A1
IN02-IN15
+4.0V
50Ω
A0
IN16
+0.8V
+0.8V EN
OUT
VOUT
100pF
FIGURE 10. CHARGE INJECTION TEST CIRCUIT
4V
“11111”
ADDRESS
50%
50%
0.8V
15V
OUTPUT
“00000”
tAHL
50%
tALH
50%
0V
FIGURE 5. ADDRESS TIME TO OUTPUT DIAGRAM
4V
ENABLE
50%
50%
0.8V
10V
OUTPUT
tENABLE
50%
tDISABLE
50%
0V
FIGURE 7. TIME TO ENABLE/DISABLE OUTPUT DIAGRAM
4V
ADDRESS
0.8V
5V
50%
OUT
0V
tBBM
FIGURE 9. BREAK-BEFORE-MAKE DIAGRAM
4V
ADDRESS
0.8V
15V
OUT
0V
Q = 100pF * ΔVOUT
ΔVOUT
FIGURE 11. CHARGE INJECTION DIAGRAM
Submit Document Feedback 11
FN8734.0
June 15, 2015
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