datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

LC4256ZE-5TN64C View Datasheet(PDF) - Lattice Semiconductor

Part Name
Description
View to exact match
LC4256ZE-5TN64C
Lattice
Lattice Semiconductor Lattice
LC4256ZE-5TN64C Datasheet PDF : 54 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Lattice Semiconductor
Figure 9. Power Guard
ispMACH 4000ZE Family Data Sheet
Power Guard
0
D
Q
1
E
All the I/O pins in a block share a common Power Guard Enable signal. For a block of I/Os, this signal is called a
Block Input Enable (BIE) signal. BIE can be internally generated using MC logic, or could come from external
sources using one of the user I/O or input pins.
Any I/O pin in the block can be programmed to ignore the BIE signal. Thus, the feature can be enabled or disabled
on a pin-by-pin basis.
Figure 10 shows Power Guard and BIE across multiple I/Os in a block that has eight I/Os.
Figure 10. Power Guard and BIE in a Block with 8 I/Os
Power Guard
0
To Macrocell
1
I/O 0
To GRP
Block Input Enable (BIE)
From Block PT. The Block PT
is part of the block AND Array,
and can be driven by signals
from the GRP.
To Macrocell
To GRP
Power Guard
0
1
I/O 1
To Macrocell
To GRP
Power Guard
0
1
I/O 7
11
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]