TDA9350 View Datasheet(PDF) - Philips Electronics
Part Name
Description
View to exact match
TDA9350 Datasheet PDF : 118 Pages
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Philips Semiconductors
TV signal processor-Teletext decoder with
embedded µ-Controller
Tentative Device Specification
TDA935X/6X/8X PS/N2 series
Names
ADD
BIT7
BIT6
BIT5
BIT4
BIT3
P1CFGB<x>/P1CFGA<x> = 00 MODE 0 Open Drain.
P1CFGB<x>/P1CFGA<x> = 01 MODE 1 Quasi Bi-Directional.
P1CFGB<x>/P1CFGA<x> = 10 MODE2 High Impedance.
P1CFGB<x>/P1CFGA<x> = 11 MODE3 Push Pull.
P2CFGA
A6H
Reserved
P2CFGA<6>
P2CFGA<5>
P2CFGA<4>
P2CFGA<3>
P2CFGB
A7H
Reserved
P2CFGB<6>
P2CFGB<5>
P2CFGB<4>
P2CFGB<3>
P2CFGB<x>/P2CFGA<x> = 00 MODE 0 Open Drain.
P2CFGB<x>/P2CFGA<x> = 01 MODE 1 Quasi Bi-Directional.
P2CFGB<x>/P2CFGA<x> = 10 MODE2 High Impedance.
P2CFGB<x>/P2CFGA<x> = 11 MODE3 Push Pull.
P3CFGA
BEH Reserved
Reserved
Reserved
Reserved
P3CFGA<3>
P3CFGB
BFH Reserved
Reserved
Reserved
Reserved
P3CFGB<3>
P3CFGB<x>/P3CFGA<x> = 00 MODE 0 Open Drain.
P3CFGB<x>/P3CFGA<x> = 01 MODE 1 Quasi Bi-directional.
P3CFGB<x>/P3CFGA<x> = 10 MODE2 High Impedance.
P3CFGB<x>/P3CFGA<x> = 11 MODE3 Push Pull.
PCON
87H
SMOD
ARD
RFI
WLE
GF1
SMOD UART Baud Rate Double Control.
ARD Auxiliary RAM Disable, All MOVX instructions access the external data memory.
RFI Disable ALE during internal access to reduce Radio Frequency Interference.
WLE Watch Dog Timer enable.
GF1 General purpose flag.
GF0 General purpose flag.
PD Power-down activation bit.
IDL Idle mode activation bit.
PSW
D0H
C
AC
F0
RS<1>
RS<0>
C Carry Bit.
AC Auxiliary Carry bit.
F0 Flag 0, General purpose flag.
RS<1:0>
Register Bank selector bits.
RS<1:0> = 00, Bank0 (00H - 07H).
RS<1:0> = 01, Bank1 (08H - 0FH).
RS<1:0> = 10, Bank2 (10H - 17H).
RS<1:0> = 11, Bank3 (18H - 1FH).
OV Overflow flag.
Table 3 SFR Bit description
BIT2
P2CFGA<2>
P2CFGB<2>
P3CFGA<2>
P3CFGB<2>
GF0
OV
BIT1
P2CFGA<1>
P2CFGB<1>
P3CFGA<1>
P3CFGB<1>
PD
-
BIT0
RESET
P2CFGA<0>
P2CFGB<0>
FFH
00H
P3CFGA<0>
P3CFGB<0>
FFH
00H
IDL
00H
P
00H
2001 Jan 18
17
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