ADP7118ACPZN2.5-R7 View Datasheet(PDF) - Analog Devices
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ADP7118ACPZN2.5-R7 Datasheet PDF : 23 Pages
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Data Sheet
145
135
125
115
105
95
85
75
65
55
45
35
25
0
140
500mm2
100mm2
50mm2
TJ MAX
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
TOTAL POWER DISSIPATION (W)
Figure 58. TSOT, TA = 25°C
130
120
110
100
90
80
70
60
50
0
145
500mm2
100mm2
50mm2
TJ MAX
0.1
0.2
0.3
0.4
0.5
0.6
0.7
TOTAL POWER DISSIPATION (W)
Figure 59. TSOT, TA = 50°C
135
125
115
105
95
85
500mm2
75
100mm2
50mm2
65
TJ MAX
0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40
TOTAL POWER DISSIPATION (W)
Figure 60. TSOT, TA = 85°C
In the case where the board temperature is known, use the thermal
characterization parameter, ΨJB, to estimate the junction
temperature rise (see Figure 61, Figure 62, and Figure 63).
Calculate the maximum junction temperature by using
Equation 2.
TJ = TB + (PD × ΨJB)
ADP7118
The typical value of ΨJB is 24°C/W for the 8-lead LFCSP package,
38.8°C/W for the 8-lead SOIC package, and 43°C/W for the 5-lead
TSOT package.
140
120
100
80
60
40
20
0
0
TB = 25°C
TB = 50°C
TB = 65°C
TB = 85°C
TJ MAX
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
TOTAL POWER DISSIPATION (W)
Figure 61. LFCSP Junction Temperature Rise, Different Board Temperatures
140
120
100
80
60
40
20
0
0
TB = 25°C
TB = 50°C
TB = 65°C
TB = 85°C
TJ MAX
0.5
1.0
1.5
2.0
2.5
3.0
TOTAL POWER DISSIPATION (W)
Figure 62. SOIC Junction Temperature Rise, Different Board Temperatures
140
120
100
80
60
40
20
0
0
TB = 25°C
TB = 50°C
TB = 65°C
TB = 85°C
TJ MAX
0.5
1.0
1.5
2.0
2.5
TOTAL POWER DISSIPATION (W)
Figure 63. TSOT Junction Temperature Rise, Different Board Temperatures
Rev. C | Page 19 of 23
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