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STC3115 View Datasheet(PDF) - STMicroelectronics

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Description
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STC3115 Datasheet PDF : 31 Pages
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I2C interface
STC3115
7.2.2
Register description
Values held in consecutive registers (such as the charge value in the REG_SOC register
pair) are stored with high bits in the first register and low bits in the second register. The
registers must be read with a single I2C access to ensure data integrity. It is possible to read
multiple values in one I2C access. All values must be consistent.
The SOC data are coded in binary format and the LSB of the low byte is 1/512 %. The
battery current is coded in 2’s complement format and the LSB value is 5.88 uV. The battery
voltage is coded in 2’s complement format and the LSB value is 2.20 mV. The temperature
is coded in 2’s complement format and the LSB value is 1°C.
Name
VMODE
CLR_VM_ADJ
CLR_CC_ADJ
ALM_ENA
GG_RUN
FORCE_CC
FORCE_VM
Table 13. REG_MODE - address 0
Position Type Def.
Description
0
R/W
1
0: Mixed mode (Coulomb counter active)
1: Power saving voltage mode
Write 1 to clear ACC_VM_ADJ and
1
R/W
0 REG_VM_ADJ.
Auto clear bit if GG_RUN = 1
2
R/W
0
Write 1 to clear ACC_CC_ADJ and REG_CC_ADJ
Auto clear bit if GG_RUN = 1
Alarm function
3
R/W
1 0: Disabled
1: Enabled
0: Standby mode. Accumulator and counter
4
R/W
0
registers are frozen, gas gauge and battery
monitor functions are in standby.
1: Operating mode.
Forces the mixed mode relaxation timer to switch
5
R/W
0
to the Coulomb counter mode.
Write 1, self clear to 0
Relaxation counter = 0
Forces the mixed mode relaxation timer to switch
6
R/W
0
to voltage gas gauge mode.
Write 1, self clear to 0
Relaxation counter = Relax_max
7
Unused
24/31
DocID023755 Rev 4
 

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