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JS28F128J3D-75 Numonyx™ Embedded Flash Memory (J3 v D) Numonyx
Numonyx -> Micron Numonyx
JS28F128J3D-75 Datasheet PDF : 66 Pages
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Numonyx™ Embedded Flash Memory (J3 v D, Monolithic)
4.2
56-Lead TSOP Package Pinout, 32-, 64-,128-, 256-Mbit
Figure 6: 56-Lead TSOP Package Pinout (32/64/128/256 Mbit)
A22
1
CE1
2
A21
3
A20
4
A19
5
A18
6
A17
7
A16
8
VCC
9
A15
10
A14
11
A13
12
A12
13
CE0
14
VPEN
15
RP#
16
A11
17
A10
18
A9
19
A8
20
GND
21
A
22
7
A
23
6
A
24
5
A
25
4
A
26
3
A
27
2
A
28
1
Intel® Embedded Flash Memory
(28FXXXJ3D)
56-Lead TSOP
Standard Pinout
14 mm x 20 mm
Top View
32/64/128/256 Mbit
56
A24
55
WE#
54
OE#
53
STS
52
DQ
15
51
DQ
7
50
DQ
14
49
DQ
6
48
GND
47
DQ13
46
DQ
5
45
DQ
12
44
DQ
4
43
VCCQ
42
GND
41
DQ
11
40
DQ
3
39
DQ
10
38
DQ
2
37
V
CC
36
DQ9
35
DQ
1
34
DQ
8
33
DQ0
32
A0
31
BYTE#
30
A23
29
CE2
Notes:
1.
A22 exists on 64- and 128- densities. On 32-Mbit density this signal is a no-connect (NC).
2.
A23 exists on 128-Mbit densities. On 32- and 64-Mbit densities this signal is a no-connect (NC)
3.
A24 exists on 256-Mbit densities and on the other densities this signal is a no-connect (NC).
4.3
Signal Descriptions
Table 3 lists the active signals used on Numonyx™ Embedded Flash Memory (J3 v D,
Monolithic) and provides a description of each.
Table 3: Signal Descriptions for Numonyx™ Embedded Flash Memory (J3 v D, Monolithic)
(Sheet 1 of 2)
Symbol
Type
Name and Function
A0
A[MAX:1]
D[7:0]
Input
Input
Input/
Output
BYTE-SELECT ADDRESS: Selects between high and low byte when the device is in x8 mode. This
address is latched during a x8 program cycle. Not used in x16 mode (i.e., the A0 input buffer is
turned off when BYTE# is high).
ADDRESS INPUTS: Inputs for addresses during read and program operations. Addresses are
internally latched during a program cycle:
32-Mbit — A[21:1]
64-Mbit— A[22:1]
128-Mbit — A[23:1]
256-Mbit — A[24:1]
LOW-BYTE DATA BUS: Inputs data during buffer writes and programming, and inputs commands
during CUI writes. Outputs array, CFI, identifier, or status data in the appropriate read mode. Data
is internally latched during write operations.
Datasheet
16
December 2007
316577-06
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