GMS81604 View Datasheet(PDF) - Hyundai Micro Electronics

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GMS81604

LG Semicon. CMOS single-chip 8-bit microcontroller. ROM size 8K bytes. 256 bytes of on-chip data RAM

Hyundai Micro Electronics 

GMS81604/08

LG Semicon

IENH

MSB

INT0E INT1E INT2E INT3E

T0E

T1E

T2E

LSB

T3E

ADDRESS: F6H

RESET VALUE: 00H

IENL

MSB

LSB

AE WDTE BITE

-

-

-

-

-

Enables or disables the interrupt individually.

If flag is cleared, the interrupt is disabled.

0: Disable

1: Enable

ADDRESS: F4H

RESET VALUE: 000-----

Figure 29. IENH, IENL: Interrupt Enable Registers

whether an interrupt will be accepted or not. When

enable flag is "0", a corresponding interrupt source is

prohibited. Note that PSW contains also a master en-

able bit, I-flag, which disables all interrupts at once.

When an interrupt is responded to, the I-flag is cleared

to disable any further interrupt, the return address is

pushed into the stack and the PC is vectored to. Once

in the interrupt service routine the source(s) of the

interrupt can be determined by polling the interrupt

flag bits.

The interrupt flag bit(s) must be cleared in software

before reenabling interrupts to avoid recursive inter-

rupts. The Interrupt Request flags are able to be read

and write.

External Interrupt

External interrupt on INT0~INT3 pins are edge trig-

gered depending the edge selection register IEDS.

The edge detection of external interrupt has three

transition activated mode: rising edge, falling edge,

both edge. INT0~INT3 are multiplexed with general

I/O ports (R40~R43). To use external interrupt pin, set

bit 0 to bit 3 of the port mode register PMR4.

The PMR4 and IEDS registers are shown in Figure

32.

INT0

INT1

INT2

INT3

EDGE DETECTOR

IEDS[1:0]

INT0IF

INT0 INTERRUPT

IEDS[3:2]

INT1IF

INT1 INTERRUPT

IEDS[5:4]

INT2IF

INT2 INTERRUPT

IEDS[7:6]

INT3IF

INT3 INTERRUPT

Figure 30. External Interrupt

38

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