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DS2417P View Datasheet(PDF) - Maxim Integrated

Part Name
Description
View to exact match
DS2417P
MaximIC
Maxim Integrated MaximIC
DS2417P Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
INTERRUPT TIMING Figure 11
VINT
Case A: Latency < 0.5 t INTERVAL
DS2417
t LATENCY
VINT
t INTERVAL
Case B: 0 < Latency < t INTERVAL
t PULSE
=
122
Time
µs
t LATENCY
t INTERVAL
t PULSE
=
122
Time
µs
The latency depends on the selected interrupt interval (IS0 to IS2 settings) and the contents of the RTC
counter at the time of writing the device control byte. In Case A, the flip-flop that determines the interval
duration is reset and toggles before half of the interval time is over. In Case B, this flip-flop is set that
generates an immediate interrupt pulse; the latency, therefore, can be up to one full interval duration.
If enabled, the interrupt pulse may also be triggered while reading from or writing to the control byte.
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