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R5F21143DSP View Datasheet(PDF) - Renesas Electronics

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R5F21143DSP Datasheet PDF : 277 Pages
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R8C/14 Group, R8C/15 Group
7. Processor Mode
7. Processor Mode
7.1 Types of Processor Mode
Single-chip mode can be selected as processor mode. Table 7.1 lists Features of Processor Mode.
Figure 7.1 shows the PM0 Register and Figure 7.2 shows the PM1 Register.
Table 7.1 Features of Processor Mode
Processor Mode
Single-Chip Mode
Access Area
Pins to which I/O ports are
assigned
SFR, Internal RAM, Internal ROM All pins are I/O ports or peripheral
function I/O pins
Processor Mode Register 0(1)
b7 b6 b5 b4 b3 b2 b1 b0
000
Symbol
PM0
Address
0004h
Bit Symbol
Bit Name
Reserved Bit
(b2-b0)
Softw are Reset Bit
PM03
After Reset
00h
Function
RW
Set to “0”
RW
The microcomputer is reset w hen this bit
is set to “1”. When read, its content is “0”.
RW
Nothing is assigned. When w rite, set to “0”.
(b7-b4) When read, its content is “0”.
NOTES :
1. Set the PRC1 bit in the PRCR register to “1” (w rite enable) before rew riting to this register.
Figure 7.1 PM0 Register
Rev.2.10 Jan 19, 2006 Page 35 of 253
REJ09B0164-0210
 

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