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R5F21143DSP View Datasheet(PDF) - Renesas Electronics

Part NameR5F21143DSP Renesas
Renesas Electronics Renesas
DescriptionR8C/14 Group, R8C/15 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
R5F21143DSP Datasheet PDF : 277 Pages
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R8C/14 Group, R8C/15 Group
6. Voltage Detection Circuit
6.3 Voltage Monitor 2 Interrupt and Voltage Monitor 2 Reset
Table 6.3 lists the Setting Procedure of Voltage Monitor 2 Interrupt and Voltage Monitor 2 Reset
Associated Bit. Figure 6.8 shows the Operating Example of Voltage Monitor 2 Interrupt and Voltage
Monitor 2 Reset. When using the voltage monitor 2 interrupt or voltage monitor 2 reset to exit stop
mode, set the VW2C1 bit in the VW2C register to “1” (digital filter disabled).
Table 6.3
Setting Procedure of Voltage Monitor 2 Interrupt and Voltage Monitor 2 Reset
Associated Bit
Procedure
1
2
3(2)
4(2)
5(2)
6
7
8
9
When Using Digital Filter
When Not Using Digital Filter
Voltage Monitor 2 Voltage Monitor 2 Voltage Monitor 2 Voltage Monitor 2
Interrupt
Reset
Interrupt
Reset
Set the VCA27 bit in the VCA2 register to “1” (voltage detection 2 circuit enabled)
Wait for td(E-A)
Select the sampling clock of the digital filter Select the timing of the interrupt and reset
by the VW2F0 to VW2F1 bits in the VW2C request by the VW2C7 bit in the VW2C
register
register(1)
Set the VW2C1 bit in the VW2C register to Set the VW2C1 bit in the VW2C register to
“0” (digital filter enabled)
“1” (digital filter disabled)
Set the VW2C6 bit in Set the VW2C6 bit in Set the VW2C6 bit in Set the VW2C6 bit in
the VW2C register to the VW2C register to the VW2C register to the VW2C register to
“0” (voltage monitor 2 “1” (voltage monitor 2 “0” (voltage monitor 2 “1” (voltage monitor 2
interrupt mode)
reset mode)
interrupt mode)
reset mode)
Set the VW2C2 bit in the VW2C register to “0” (passing of Vdet2 is not detected)
Set the CM14 bit in the CM1 register to “0”
(low-speed on-chip oscillator on)
Wait for the sampling clock of the digital filter (no wait time)
x 4 cycles
Set the VW2C0 bit in the VW2C register to “1” (enables voltage monitor 2 interrupt / reset)
NOTES:
1. Set the VW2C7 bit to “1” (when VCC reaches Vdet2 or below) for the voltage monitor 2 reset.
2. When the VW2C0 bit is set to “0” (disabled), procedures 3, 4 and 5 can be executed simultaneously
(with 1 instruction).
Rev.2.10 Jan 19, 2006 Page 33 of 253
REJ09B0164-0210
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 Overview
This MCU is built using the high-performance silicon gate CMOS process using a R8C/Tiny Series CPU core and is packaged in a 20-pin plastic molded LSSOP. This MCU operates using sophisticated instructions featuring a high level of instruction efficiency. With 1 Mbyte of address space, it is capable of executing instructions at high speed. Furthermore, the data flash ROM (1KB × 2blocks) is embedded in the R8C/15 group.
The difference between R8C/14 and R8C/15 groups is only the existence of the data flash ROM. Their peripheral functions are the same.

 Applications
Electric household appliance, office equipment, housing equipment (sensor, security), general industrial equipment, audio, etc.

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