R8C/14 Group, R8C/15 Group
6. Voltage Detection Circuit
Voltage Detection Register 1
b7 b6 b5 b4 b3 b2 b1 b0
0 0 0 0 0 0 0 Symbol
Address
After Reset(2)
VCA1
0031h
00001000b
Bit Symbol
Bit Name
Function
RW
—
Reserved Bit
Set to “0”
(b2-b0)
RW
Voltage Detection 2 Signal Monitor 0 : VCC < Vdet2
VCA13 Flag(1)
1 : VCC ≥ Vdet2 or voltage detection 2
RO
circuit disabled
—
Reserved Bit
Set to “0”
(b7-b4)
RW
NOTES :
1. The VCA13 bit is enabled w hen the VCA27 bit in the VCA2 register is set to “1” (voltage detection 2 circuit enabled).
The VCA13 bit is set to “1” (VCC ≥ Vdet 2) w hen the VCA27 bit in the VCA2 register is set to “0” (voltage detection 2
circuit disabled).
2. The softw are reset, w atchdog timer reset and voltage monitor 2 reset do not affect this register.
Voltage Detection Register 2(1)
b7 b6 b5 b4 b3 b2 b1 b0
After Reset(4)
000000
Symbol
VCA2
Address
0032h
Bit Symbol
Bit Name
—
Reserved Bit
(b5-b0)
Hardw are Reset : 00h
Pow er-On Reset, Voltage Monitor 1Reset
: 01000000b
Function
RW
Set to “0”
RW
Voltage Detection 1 Enable Bit(2)
0 : Voltage detection 1 circuit disabled
VCA26
1 : Voltage detection 1 circuit enabled
RW
Voltage Detection 2 Enable Bit(3)
0 : Voltage detection 2 circuit disabled
VCA27
1 : Voltage detection 2 circuit enabled
RW
NOTES :
1. Set the PRC3 bit in the PRCR register to “1” (w rite enable) before w riting to this register.
2. When using the voltage monitor 1 reset, set the VCA26 bit to “1”.
Af ter the VCA26 bit is set f rom “0” to “1”, the voltage detection circuit elapses f or td(E-A) bef ore starting operation.
3. When using the voltage monitor 2 interrupt / reset or the VCA13 bit in the VCA1 register, set the VCA27 bit to “1”.
After the VCA27 bit is f rom “0” to “1”, the voltage detection circuit elapses f or td(E-A) bef ore starting operation.
4. The softw are reset, w atchdog timer reset and voltage monitor 2 reset do not affect this register.
Figure 6.4 VCA1 and VCA2 Registers
Rev.2.10 Jan 19, 2006 Page 28 of 253
REJ09B0164-0210