ATMEGA8515-16JI(2010) View Datasheet(PDF) - Atmel Corporation

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Description

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ATMEGA8515-16JI
(Rev.:2010)

8-bit Microcontroller with 8K Bytes In-System Programmable Flash

Atmel Corporation 

System Clock and

Clock Options

Clock Systems and their

Distribution

Figure 18 presents the principal clock systems in the AVR and their distribution. All of

the clocks need not be active at a given time. In order to reduce power consumption, the

clocks to modules not being used can be halted by using different sleep modes, as

described in “Power Management and Sleep Modes” on page 41. The clock systems

are detailed below.

Figure 18. Clock Distribution

General I/O

Modules

CPU Core

RAM

Flash and

EEPROM

clkI/O

AVR Clock

Control Unit

clkCPU

clkFLASH

Reset Logic

Watchdog Timer

Source clock

Clock

Multiplexer

Watchdog clock

Watchdog

Oscillator

CPU Clock – clkCPU

I/O Clock – clkI/O

External RC

Oscillator

External Clock

Crystal

Oscillator

Low-frequency

Crystal Oscillator

Calibrated RC

Oscillator

The CPU clock is routed to parts of the system concerned with operation of the AVR

core. Examples of such modules are the General Purpose Register File, the Status Reg-

ister, and the Data memory holding the Stack Pointer. Halting the CPU clock inhibits the

core from performing general operations and calculations.

The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and

USART. The I/O clock is also used by the External Interrupt module, but note that some

external interrupts are detected by asynchronous logic, allowing such interrupts to be

detected even if the I/O clock is halted.

34 ATmega8515(L)

2512K–AVR–01/10

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