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MT3333 View Datasheet(PDF) - MediaTek Inc

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MT3333 Datasheet PDF : 26 Pages
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7. Interface Characteristics
MT3333 All-in-One GNSS
Datasheet
7.1. RS-232 interface timing
Required baud rate (bps)
4,800
9,600
14,400
19,200
38,400
57,600
115,200
230,400
460,800
921,600
Programmed baud rate (bps)
4,800.000
9,600.000
14,408.451
19,164.319
38,422.535
57,633.803
115,267.606
230,535.211
454,666.667
909,333.333
Baud rate error (%)
0.0000
0.0000
0.0587
0.0587
0.0587
0.0587
0.0587
0.0587
-1.3310
-1.3310
Baud rate error (%)
0.002
0.002
0.0567
0.0567
0.0567
0.0567
0.0567
0.0567
-1.3330
-1.3330
Notes:
1) UART baud rate settings with UART_CLK frequency = 16.368 MHz (UART_CLK uses the system reference
clock).
2) The baud rate error is optimized. Each baud rate needs to adjust its counter to obtain the optimized error.
LSB
TX / RX
Start bit Data bits (one byte) End bit
Figure 7-1: Timing diagram of the RS-232 interface
7.2. SPI interface timing
Description
SCS# setup time
SCS# hold time
SO setup time
SO hold time
SIN setup time
SIN hold time
Symbol
T1
T2
T3
T4
T5
T6
Min.
0.5T
0.5T
0.5T – 3t
0.5T + 2t
3t
10
Max.
Unit
-
ns
-
ns
0.5T - 2t
ns
0.5T + 3t
ns
-
ns
-
ns
Notes:
1) The definition of SPI clock cycle (T) is (SPI_IPLL/12) MHz ~ (rf_clk/1,020) MHz.
2) It indicates the period of SPI controller clock, which is SPI_IPLL clock or rf_clk.
Note
1
1
1, 2
1, 2
1, 2
1
© 2016 - 2017 MediaTek Inc.
Page 19 of 22
This document contains information that is proprietary to MediaTek Inc. (“MediaTek”) and/or its licensor(s).
Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.
 

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