MT3333 View Datasheet(PDF) - MediaTek Inc

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MT3333

High-performance Single-chip Multi-gnss Solution

MediaTek Inc 

5. Processor Subsystem Features

MT3333 All-in-One GNSS

Datasheet

5.1. ARM7EJ-S

The ARM7EJ-S processor provides the flexibility necessary to build Java-enabled, real-time embedded devices

requiring small size, low-power and high performance. It builds on the features and benefits of the established

ARM7TDMI core and is delivered in synthesizable form.

ARM7EJ-S includes a JTAG interface that provides a standard development and debugging interface. The interface

can connect to a variety of off-the-shelf emulators. These emulators can provide single-step, trap and access to all

the internal registers of the processor subsystem.

5.2. Cache

MT3333 provides a cache to speed up program execution and reduce external flash access times. It supports cache

buffer and can be repurposed as internal memory when it is not used fully.

5.3. Boot ROM

The embedded boot ROM provides for the loading of user code through a serial interface into SRAM. The serial

interface (UART, SPI or I2C) is determined by strap control.

5.4. Real Time Clock (RTC)

There is a built-in 1.1 volts low-dropout (LDO) regulator for the RTC domain, which can be bypassed when an

external LDO is used. The RTC LDO is a voltage regulator that has a very low quiescent current. A small ceramic

capacitor can be used as the output capacitor, and the stable operation region ranges from very light load (≈0mA)

to about 3 mA.

Also within the RTC power domain the MT3333 provides a very low leakage battery backed-up memory. This

memory contains all the necessary multi-GNSS information for quick start-up and a small number of user

configuration variables.

5.5. Switching Mode Power Supply (SMPS)

A built-in SMPS provides a 1.8 volts power supply for the digital 1.1 volts Core Low-Dropout (CLDO) regulator and

RF input power. In the active mode, the SMPS operates in automatic pulse width modulation (PWM) and pulse

frequency modulation (PFM) switching mode. In low power mode, the SMPS operates with reduced switching

frequency in the PFM mode.

5.6. Timer function

The timer function supports time tick generation with 31.25 ms resolution.

5.7. General Purpose Input/Output (GPIO) in the RTC domain

The 32K_OUT pin in the RTC domain can output a 32.768 kHz clock. This can be used to support a low clock rate

operation mode, for applications or peripherals that need an external clock source. This pin can be programmed to

be the input pin to receive a wake-up signal from an external accelerator sensor IC, when MT3333 is in the low-

power mode.

© 2016 - 2017 MediaTek Inc.

Page 7 of 22

This document contains information that is proprietary to MediaTek Inc. (“MediaTek”) and/or its licensor(s).

Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.

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