74ALVC08_17 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

View to exact match

74ALVC08_17

Quad 2-input AND gate

NXP Semiconductors. 

Nexperia

4 Functional diagram

1

&

3

2

1 1A

2 1B

4 2A

5 2B

9 3A

10 3B

12 4A

13 4B

1Y 3

2Y 6

3Y 8

4Y 11

mna222

Figure 1. Logic symbol

4

&

6

5

9

&

8

10

12

&

11

13

mna223

Figure 2. IEC logic symbol

5 Pinning information

74ALVC08

Quad 2-input AND gate

A

Y

B

mna221

Figure 3. Logic diagram (one gate)

5.1 Pinning

74ALVC08

1A 1

14 VCC

1B 2

13 4B

1Y 3

12 4A

2A 4

11 4Y

2B 5

10 3B

2Y 6

9 3A

GND 7

8 3Y

aaa-27559

Figure 4. Pin configuration SO14

74ALVC08

terminal 1

index area

1B 2

1Y 3

2A 4

2B 5

2Y 6

GND(1)

13 4B

12 4A

11 4Y

10 3B

9 3A

74ALVC08

aaa-027561

1A 1

14 VCC

Transparent top view

1B 2

13 4B

(1) This is not a supply pin, the

1Y 3

12 4A

substrate is attached to this pad using

2A 4

2B 5

2Y 6

GND 7

11 4Y

10 3B

9 3A

8 3Y

conductive die attach material. There is

no electrical or mechanical requirement

to solder this pad however if it is

soldered the solder land should remain

floating or be connected to GND.

aaa-027560

Figure 6. Pin configuration

Figure 5. Pin configuration TSSOP14 DHVQFN14

74ALVC08

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 5 October 2017

© Nexperia B.V. 2017. All rights reserved.

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