ISL80101A View Datasheet(PDF) - Intersil

Part Name

Description

View to exact match

ISL80101A

1A Ultra Low Dropout Linear Regulator with Programmable Current Limiting

Intersil 

Pin Configuration

ISL80121-5

ISL80121-5

(10 LD 3x3 DFN)

TOP VIEW

VOUT 1

VOUT 2

SENSE 3

PG 4

GND 5

PAD

10 VIN

9 VIN

8 ISET

7 ENABLE

6 SS

Pin Descriptions

PIN NUMBER

1, 2

3

4

5

6

7

8

9, 10

-

PIN NAME

VOUT

SENSE

PG

GND

SS

ENABLE

ISET

VIN

EPAD

DESCRIPTION

Output voltage. A minimum 10µF X5R/X7R output capacitor is required for stability. See “External Capacitor

Requirements” on page 8 in the “Functional Description” for more details.

Remote voltage sense for internally fixed VOUT options. Parasitic resistance between the VOUT pin and the load

causes small voltage drops which degrade VOUT accuracy. For applications that require a stiff VOUT, connect the

sense pin to the load.

VOUT in regulation signal. Logic low indicates VOUT is not in regulation, and must be grounded if not used.

Ground.

External capacitor adjusts in-rush current.

VIN-independent chip enable. TTL and CMOS compatible.

Current limit setting. Current limit is 0.75A when this pin is left floating. This default value can be increased by

tying RSET to GND, or decreased by tying RSET to VIN. See “Programmable Current Limit” on page 7 in the

“Functional Description” for more details. Do not short this pin to ground.

Input supply. A minimum of 10µF X5R/X7R input capacitor is required for stability. See “External Capacitor

Requirements” on page 8 in “Functional Description” for more details.

EPAD at ground potential. Soldering it directly to GND plane is required for thermal considerations. See “Power

Dissipation and Thermals” on page 9 for more details.

3

FN7713.4

September 29, 2011

Share Link: