datasheetbank_Logo     Технический паспорт Поисковая и бесплатно техническое описание Скачать

ADC08060 Просмотр технического описания (PDF) - Texas Instruments

Номер в каталогеКомпоненты Описаниепроизводитель
ADC08060 8-Bit, 20 MSPS to 60 MSPS, 1.3 m W/MSPS A/D Converter with Internal Sampleand-Hold TI
Texas Instruments TI
ADC08060 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
www.ti.com
Pin No.
Symbol
ADC08060
SNAS120H – OCTOBER 2000 – REVISED MARCH 2013
PIN DESCRIPTIONS AND EQUIVALENT CIRCUITS
Equivalent Circuit
Description
6
VIN
Analog signal input. Conversion range is VRB to VRT.
3
VRT
9
VRM
10
VRB
23
PD
24
CLK
Analog Input that is the high (top) side of the reference ladder
of the ADC. Nominal range is 1.0V to VA. Voltage on VRT and
VRB inputs define the VIN conversion range. Bypass well. See
THE ANALOG INPUT for more information.
Mid-point of the reference ladder. This pin should be bypassed
to a clean, quiet point in the analog ground plane with a 0.1
µF capacitor.
Analog Input that is the low side (bottom) of the reference
ladder of the ADC. Nominal range is 0.0V to (VRT – 1.0V).
Voltage on VRT and VRB inputs define the VIN conversion
range. Bypass well. See THE ANALOG INPUT for more
information.
VA
Power Down input. When this pin is high, the converter is in
the Power Down mode and the data output pins hold the last
conversion result.
CMOS/TTL compatible digital clock Input. VIN is sampled on
the falling edge of CLK input.
GND
13 thru 16
and
19 thru 22
D0–D7
Conversion data digital Output pins. D0 is the LSB, D7 is the
MSB. Valid data is output just after the rising edge of the CLK
input.
7
1, 4, 12
18
17
2, 5, 8, 11
VIN GND
VA
DR VD
DR GND
AGND
Reference ground for the single-ended analog input, VIN.
Positive analog supply pin. Connect to a clean, quiet voltage
source of +3V. VA should be bypassed with a 0.1 µF ceramic
chip capacitor for each pin, plus one 10 µF capacitor. See
POWER SUPPLY CONSIDERATIONS for more information.
Power supply for the output drivers. If connected to VA,
decouple well from VA.
The ground return for the output driver supply.
The ground return for the analog supply.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: ADC08060
Submit Documentation Feedback
3
Direct download click here

 

Share Link : 

All Rights Reserved © datasheetbank.com 2014 - 2019 [ политика конфиденциальности ] [ Запрос Даташит ]