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ADC08060CIMTX/NOPB View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
ADC08060CIMTX/NOPB 8-Bit, 20 MSPS to 60 MSPS, 1.3 m W/MSPS A/D Converter with Internal Sampleand-Hold TI
Texas Instruments TI
ADC08060CIMTX/NOPB Datasheet PDF : 28 Pages
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ADC08060
SNAS120H – OCTOBER 2000 – REVISED MARCH 2013
www.ti.com
• tPD is the signal propagation rate down the clock line, "L" is the line length
• ZO is the characteristic impedance of the clock line
(7)
This termination should be located as close as possible to, but within one centimeter of, the ADC08060 clock pin.
Further, the termination should be beyond the ADC08060 clock pin as seen from the clock source. Typical tPD is
about 150 ps/inch on FR-4 board material. For FR-4 board material, the value of C becomes
where
• L is the length of the clock line in inches
(8)
LAYOUT AND GROUNDING
Proper grounding and proper routing of all signals are essential to ensure accurate conversion. A combined
analog and digital ground plane should be used.
Since digital switching transients are composed largely of high frequency components, total ground plane copper
weight will have little effect upon the logic-generated noise because of the skin effect. Total surface area is more
important than is total ground plane volume. Capacitive coupling between the typically noisy digital circuitry and
the sensitive analog circuitry can lead to poor performance that may seem impossible to isolate and remedy. The
solution is to keep the analog circuitry well separated from the digital circuitry.
The DR GND connection to the ground plane should not use the same feedthrough used by other ground
connections.
High power digital components should not be located on or near a straight line between the ADC (or any linear
component) and the power supply area as the resulting common return current path could cause fluctuation in
the analog “ground” return of the ADC.
Generally, analog and digital lines should cross each other at 90° to avoid getting digital noise into the analog
path. In high frequency systems, however, avoid crossing analog and digital lines altogether. Clock lines should
be isolated from ALL other lines, analog AND digital. Even the generally accepted 90° crossing should be
avoided as even a little coupling can cause problems at high frequencies. Best performance at high frequencies
is obtained with a straight signal path.
The analog input should be isolated from noisy signal traces to avoid coupling of spurious signals into the input.
Any external component (e.g., a filter capacitor) connected between the converter's input and ground should be
connected to a very clean point in the analog ground plane.
Figure 33 gives an example of a suitable layout. All analog circuitry (input amplifiers, filters, reference
components, etc.) should be placed together away from any digital components.
20
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