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74AHC2G125DP View Datasheet(PDF) - NXP Semiconductors.

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Description
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74AHC2G125DP
NXP
NXP Semiconductors. NXP
74AHC2G125DP Datasheet PDF : 15 Pages
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NXP Semiconductors
74AHC2G125; 74AHCT2G125
Dual buffer/line driver; 3-state
6.2 Pin description
Table 3. Pin description
Symbol
Pin
1OE, 2OE
1, 7
1A, 2A
2, 5
GND
4
1Y, 2Y
6, 3
VCC
8
7. Functional description
Description
output enable input (active LOW)
data input
ground (0 V)
data output
supply voltage
Table 4.
Control
nOE
L
L
H
Function table[1]
Input
nA
L
H
X
Output
nY
L
H
Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
VI
input voltage
IIK
input clamping current
VI < 0.5 V
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
IO
output current
0.5 V < VO < VCC + 0.5 V
0.5
+7.0
V
0.5
+7.0
V
[1] 20
-
mA
[1] -
±20
mA
-
±25
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
Tamb = 40 °C to +125 °C
-
75
65
[2] -
75
mA
-
mA
+150
°C
250
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP8 package: above 55 °C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 °C the value of Ptot derates linearly with 8 mW/K.
For XSON8U package: above 45 °C the value of Ptot derates linearly with 2.4 mW/K.
74AHC_AHCT2G125_2
Product data sheet
Rev. 02 — 22 December 2008
© NXP B.V. 2008. All rights reserved.
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