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74LV125 View Datasheet(PDF) - NXP Semiconductors.

Part NameDescriptionManufacturer
74LV125 Quad buffer/line driver; 3-state NXP
NXP Semiconductors. NXP
74LV125 Datasheet PDF : 15 Pages
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NXP Semiconductors
74LV125
Quad buffer/line driver; 3-state
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8.
Symbol Parameter
Conditions
40 °C to +85 °C
Min Typ[1] Max
tdis
disable time
nOE to nY; see Figure 7
[2]
VCC = 1.2 V
-
65
-
VCC = 2.0 V
-
24
32
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
-
[3]
-
18
24
14
20
VCC = 4.5 V to 5.5 V
-
CPD
power dissipation CL = 50 pF; fi = 1 MHz;
[4]
-
capacitance
VI = GND to VCC; VCC = 3.3 V
-
17
22
-
[1] All typical values are measured at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3 V).
[4] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fI = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
Σ(CL × VCC2 × fo) = sum of the outputs.
40 °C to +125 °C Unit
Min
Max
-
-
ns
-
39
ns
-
29
ns
-
24
ns
-
21
ns
-
-
pF
11. Waveforms
VI
nA input
GND
VOH
nY output
VOL
VM
tPHL
VM
tPLH
mna230
Fig 6.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
The input (nA) to output (nY) propagation delays
74LV125_3
Product data sheet
Rev. 03 — 7 April 2009
© NXP B.V. 2009. All rights reserved.
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