FW82801IRQT28 View Datasheet(PDF) - Intel
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FW82801IRQT28 Datasheet PDF : 885 Pages
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22.2
22.1.15PR2—Protected Range 2 Register
(SPI Memory Mapped Configuration Registers) ......................................... 832
22.1.16PR3—Protected Range 3 Register
(SPI Memory Mapped Configuration Registers) ......................................... 833
22.1.17PR4—Protected Range 4 Register
(SPI Memory Mapped Configuration Registers) ......................................... 834
22.1.18SSFS—Software Sequencing Flash Status Register
(SPI Memory Mapped Configuration Registers) ......................................... 835
22.1.19SSFC—Software Sequencing Flash Control Register
(SPI Memory Mapped Configuration Registers) ......................................... 836
22.1.20PREOP—Prefix Opcode Configuration Register
(SPI Memory Mapped Configuration Registers) ......................................... 837
22.1.21OPTYPE—Opcode Type Configuration Register
(SPI Memory Mapped Configuration Registers) ......................................... 837
22.1.22OPMENU—Opcode Menu Configuration Register
(SPI Memory Mapped Configuration Registers) ......................................... 838
22.1.23BBAR—BIOS Base Address Configuration Register
(SPI Memory Mapped Configuration Registers) ......................................... 839
22.1.24FDOC—Flash Descriptor Observability Control Register
(SPI Memory Mapped Configuration Registers) ......................................... 839
22.1.25FDOD—Flash Descriptor Observability Data Register
(SPI Memory Mapped Configuration Registers) ......................................... 840
22.1.26AFC—Additional Flash Control Register
(SPI Memory Mapped Configuration Registers) ......................................... 840
22.1.27LVSCC— Host Lower Vendor Specific Component Capabilities Register
(SPI Memory Mapped Configuration Registers) ......................................... 841
22.1.28 UVSCC— Host Upper Vendor Specific Component Capabilities Register
(SPI Memory Mapped Configuration Registers) ......................................... 842
22.1.29FPB — Flash Partition Boundary
(SPI Memory Mapped Configuration Registers) ......................................... 844
Flash Descriptor Registers ................................................................................ 845
22.2.1 Flash Descriptor Content ....................................................................... 845
22.2.1.1 FLVALSIG - Flash Valid Signature Register
(Flash Descriptor Registers) ..................................................... 845
22.2.1.2 FLMAP0 - Flash Map 0 Register (Flash Descriptor Registers).......... 845
22.2.1.3 FLMAP1—Flash Map 1 Register (Flash Descriptor Registers) .......... 846
22.2.1.4 FLMAP2—Flash Map 2 Register (Flash Descriptor Registers) .......... 846
22.2.2 Flash Descriptor Component Section ....................................................... 847
22.2.2.1 FLCOMP—Flash Components Register
(Flash Descriptor Registers) ..................................................... 847
22.2.2.2 FLILL—Flash Invalid Instructions Register
(Flash Descriptor Registers) ..................................................... 849
22.2.2.3 FLPB—Flash Partition Boundary Register
(Flash Descriptor Registers) ..................................................... 849
22.2.3 Flash Descriptor Region Section ............................................................. 850
22.2.3.1 FLREG0—Flash Region 0 Register (Flash Descriptor Registers) ...... 850
22.2.3.2 FLREG1—Flash Region 1 (BIOS) Register
(Flash Descriptor Registers) ..................................................... 850
22.2.3.3 FLREG2—Flash Region 2 (ME) Register
(Flash Descriptor Registers) ..................................................... 851
22.2.3.4 FLREG3—Flash Region 3 (GbE) Register
(Flash Descriptor Registers) ..................................................... 851
22.2.3.5 FLREG4—Flash Region 4 (Platform Data) Register
(Flash Descriptor Registers) ..................................................... 851
22.2.4 Flash Descriptor Master Section.............................................................. 852
22.2.4.1 FLMSTR1—Flash Master 1 (Host CPU/ BIOS)
(Flash Descriptor Registers) ..................................................... 852
22.2.4.2 FLMSTR2—Flash Master 2 (ME) (Flash Descriptor Registers) ......... 853
Intel® I/O Controller Hub 9 (ICH9) Family Datasheet
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