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LA76810A View Datasheet(PDF) - SANYO -> Panasonic

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LA76810A Datasheet PDF : 40 Pages
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LA76810A
Deflection Block Input Signals and Test Conditions
Unless otherwise specified, the following conditions apply when each measurement is made.
1. VIF, SIF blocks: No signal
2. C input: No. signal
3. Sync input: A horizontal/vertical composite sync signal
PAL: 43IRE, horizontal sync signal (15.625kHz) and vertical sync signal (50kHz)
NTSC: 40IRE, horizontal sync signal (15.734264kHz) and vertical sync signal (59.94kHz)
Note: No burst signal, chroma signal shall exist below the pedestal level.
Signal unsuitable
for Y input
Signal suitable
for Y input
Chroma signal
Burst signal
4. Bus control conditions: Initial conditions unless otherwise specified.
5. The delay time from the rise of the horizontal output (pin 27 output) to the fall of the FBP IN (pin 28 input) is 9ยตs.
6. Pin 13 (vertical size correction circuit input terminal) is connected to VCC (5.0V).
NoA0252-22/40
 

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