BR93LL46F View Datasheet(PDF) - ROHM Semiconductor
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BR93LL46F Datasheet PDF : 11 Pages
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Memory ICs
BR93LL46F / BR93LL46FV
(3) Precautions when turning power on and off
᭺When turning the power supply on and off, make
sure CS is set to LOW (see Figure 6).
When CS is HIGH, the EEPROM enters the active
state. If the power supply is turned on in this state,
noise and other factors can cause malfunctions and
erroneous writing. To avoid this, make sure CS is set to
LOW (disable mode) when turning on the power sup-
ply. (When CS is LOW, all input is cancelled.)
When the power supply is turned off, the low power
state can continue for a long time because of the
capacity of the power supply line. Erroneous opera-
tions and erroneous writing can occur at such times for
the same reasons as described above. To avoid this,
make sure CS is set to LOW before turning off the
power supply.
+ 5V
VCC
GND
+ 5V
CS
GND
Bad example
To prevent erroneous writing, these ICs are equipped
with a POR (Power On Reset) circuit, but in order to
achieve operation at a low power supply, VCC is set to
operate at approximately 1.3V. After the POR has been
activated, writing is disabled, but if CS is set to HIGH,
writing may be enabled because of noise or other fac-
tors. However, the POR circuit is effective only when
the power supply is on, and will not operate when the
power is off. Also, to prevent erroneous writing at low
voltages, these ICs are equipped with a built-in circuit
which resets the write command if VCC drops to approx-
imately 1.5V or lower (typ.)
(VCC-lockout circuit)
Good example
Fig.6
(Bad example) Here, the CS pin is pulled up to VCC.
In this case, CS is HIGH (active state).
Please be aware that the EEPROM
may perform erroneous operations or
write erroneous data because of noise
or other factors.
∗ Even if the CS input is HIGH-Z,
please be aware that cases such as
this can occur.
(Good example) In this case, CS is LOW when the
power supply is turned on or off.
(4) Clock (SK) rise conditions
If the clock pin (SK) signal of the BR93LL46F / FV has
a long rise time (Tr) and if noise on the signal line
exceeds a certain level, erroneous operation can occur
due to erroneous counts in the clock. To prevent this, a
Schmitt trigger is built into the SK input of the BR93LL-
46F / FV. The hysteresis amplitude of this circuit is
8
set to approximately 0.2V, so if the noise exceeds the
SK input, the noise amplitude should be set to 0.2 VP-P
or lower. Furthermore, rises and falls in the clock input
should be accelerated as much as possible.
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