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HN58X25128I View Datasheet(PDF) - Renesas Electronics

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Description
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HN58X25128I Datasheet PDF : 27 Pages
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HN58X25128I/HN58X25256I
Instruction Set
Instruction
WREN
WRDI
RDSR
WRSR
READ
WRITE
Description
Write Enable
Write Disable
Read Status Register
Write Status Register
Read from Memory Array
Write to Memory Array
Instruction Format
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 0010
Write Enable (WREN):
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to
do this is to send a Write Enable instruction to the device. As shown in the following figure, to send this
instruction to the device, chip select (S) is driven low, and the bits of the instruction byte are shifted in, on
serial data input (D). The device then enters a wait state. It waits for the device to be deselected, by chip
select (S) being driven high.
Write Enable (WREN) Sequence
VIH
5
VIL
9
VIH
VIL
VIH
C
VIL
VIH
D
VIL
Q
0 123 456 7
Instruction
High-Z
Rev.1.00, Jun.20.2003, page 14 of 27
 

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