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25Q80DVAIG View Datasheet(PDF) - Winbond

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25Q80DVAIG Datasheet PDF : 71 Pages
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W25Q80DV
Read SFDP Register (5Ah)
The W25Q80DV features a 256-Byte Serial Flash Discoverable Parameter (SFDP) register that contains
information about devices operational capability such as available commands, timing and other features.
The SFDP parameters are stored in one or more Parameter Identification (PID) tables. Currently only
one PID table is specified but more may be added in the future. The Read SFDP Register instruction is
compatible with the SFDP standard initially established in 2010 for PC and other applications. Most
Winbond SpiFlash Memories shipped after June 2011 (date code 1124 and beyond) support the SFDP
feature as specified in the applicable datasheet.
The Read SFDP instruction is initiated by driving the /CS pin low and shifting the instruction code “5Ah”
followed by a 24-bit address (A23-A0)(1) into the DI pin. Eight “dummy” clocks are also required before
the SFDP register contents are shifted out on the falling edge of the 40th CLK with most significant bit
(MSB) first as shown in figure 34b. For SFDP register values and descriptions, please refer to the
Winbond Application Note for SFDP Definition Table,
Notes: A23-A8 = 0; A7-A0 are used to define the starting byte address for the 256-Byte SFDP Register
Instruction (5Ah)
.
Figure 34b. Read SFDP Register Instruction Sequence Diagram
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Publication Release Date:July 21, 2015
Prelimry-Revision G
 

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