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74ALVCH16373DL,112 View Datasheet(PDF) - NXP Semiconductors.

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74ALVCH16373DL,112
NXP
NXP Semiconductors. NXP
74ALVCH16373DL,112 Datasheet PDF : 18 Pages
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NXP Semiconductors
74ALVCH16373
2.5 V/3.3 V 16-bit D-type transparent latch; 3-state
5.2 Pin description
Table 2. Pin description
Symbol
Pin
1OE, 2OE
1, 24
1Q0 to 1Q7
2, 3, 5, 6, 8, 9, 11, 12
2Q0 to 2Q7
13, 14, 16, 17, 19, 20, 22, 23
GND
4, 10, 15, 21, 28, 34, 39, 45
VCC
1D0 to 1D7
7, 18, 31, 42
47, 46, 44, 43, 41, 40, 38, 37
2D0 to 2D7
36, 35, 33, 32, 30, 29, 27, 26
1LE, 2LE
48, 25
6. Functional description
Description
output enable input (active LOW)
data outputs
data outputs
ground (0 V)
positive supply voltage
data inputs
data inputs
latch enable input (active HIGH)
6.1 Function table
Table 3.
Inputs
nOE
L
L
L
L
H
H
Function table[1]
nLE
nDn
H
L
H
H
L
l
L
h
L
l
L
h
Internal latches Outputs nQn
L
L
H
H
L
L
H
H
L
Z
H
Z
[1] H = HIGH voltage level;
L = LOW voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH LE transition;
I = LOW voltage level one set-up time prior to the LOW-to-HIGH LE transition;
Z = high-impedance OFF-state.
Operating mode
enable and read register
(transparent mode)
latch and read register
(hold mode)
latch register and disable outputs
74ALVCH16373
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 10 July 2012
© NXP B.V. 2012. All rights reserved.
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